Relation between BDD and DP ... BDD-DP Theorem For BDD wit

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On the Relation between SAT and BDDs for
Equivalence Checking
Sherief Reda Rolf Drechsler
Alex Orailoglu
Computer Science Engineering Dept.
Institute of Computer Science University of
Bremen
Computer Science Engineering Dept.
University of California, San Diego
University of California, San Diego
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Outline
Introduction
BDDs
The Davis-Putnam (DP) Procedure
Equivalence Checking
BDD-DP Relation
Characteristics of CNF Formulas of Logic Circuits
Relation between BDD and the DP
Dynamic Variable Ordering for the DP Procedure
Open questions
Experimental Results
Conclusions
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Introduction
BDDs have been traditionally used in logic
synthesis and verification
New Boolean satisfiability (SAT) solvers have
shown recent promise as efficient equivalence
checkers
It is essential to understand the relation
between BDDs and SAT procedures and show how the
techniques of one domain can be applied to the
other
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Binary Decision Diagrams
ROBDDs are produced through the repeated
application of
? Redundant test elimination
? Equivalent sub-graph sharing
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The Davis-Putnam Procedure
assign(sat_formula ?, literal v) begin a1. v
true a2. simplify ? a3. apply unit clause
propagation a4. if ? has an empty clause
then return false else return
true end DP(sat_formula ?) begin d1. choose
literal v to split on d2. if v NULL then
return true d3. if assign(?, v) then d4. if
DP(?) then return true d5. undo v
assignment d6. if assign(?, ?v) then d7. if
DP(?) then return true d8. return false end
? (?a d) ? (?b d) ? (a b ?d) ? (c ?z)
? (d ?z) ? (?d ?c z).
Consistent assignment achieved
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The Davis-Putnam Procedure
assign(sat_formula ?, literal v) begin a1. v
true a2. simplify ? a3. apply unit clause
propagation a4. if ? has an empty clause
then return false else return
true end DP(sat_formula ?) begin d1. choose
literal v to split on d2. if v NULL then
return true d3. if assign(?, v) then d4. if
DP(?) then return true d5. undo v
assignment d6. if assign(?, ?v) then d7. if
DP(?) then return true d8. return false end
? (?a d) ? (?b d) ? (a b ?d) ? (c ?z)
? (d ?z) ? (?d ?c z).
0
0
0
0
1
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Equivalence Checking
Core equivalence checking techniques
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Equivalence Checking
? Equivalence checking can be viewed as
Decision tree of Circuit II
Decision tree of Circuit I
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Characteristics of CNF Formulas of Logic Circuits
Let ? be a CNF formula generated from a logic
circuit
Let V(?) be the set of variables that ? depends on
It is possible to find a set of variables P(?) ?
V(?) such that ? can be satisfied by only
splitting on the variables of P(?) in the DP
procedure.
P(?) is the set of primary inputs
Reducing the number of decision variables
introduces an overall reduction in the decision
tree size
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Characteristics of CNF Formulas of Logic Circuits
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Characteristics of CNF Formulas of Logic Circuits
a
d
z
b
c
? (?a d) ? (?b d) ? (a b ?d) ? (c ?z)
? (d ?z) ? (?d ?c z)
? z
P(?) a, b, c
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Characteristics of CNF Formulas of Logic Circuits
a
d
z
b
c
? (?a d) ? (?b d) ? (a b ?d) ? (c ?z)
? (d ?z) ? (?d ?c z)
? z
P(?) a, b, c
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Characteristics of CNF Formulas of Logic Circuits
a
d
z
b
c
? (?a d) ? (?b d) ? (a b ?d) ? (c ?z)
? (d ?z) ? (?d ?c z)
? z
P(?) a, b, c
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Characteristics of CNF Formulas of Logic Circuits
a
d
z
b
c
? (?a d) ? (?b d) ? (a b ?d) ? (c ?z)
? (d ?z) ? (?d ?c z)
? z
P(?) a, b, c
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Characteristics of CNF Formulas of Logic Circuits
Observation 1 DP decision space is reduced to be
that of the primary inputs
Observation 2 Redundant variables are not
considered for decision in the DP procedure
Observation 1 reduces the decision space to be
like that of a BDD and observation 2 parallels
the removal of redundant test in BDDs.
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Relation between BDD and DP
Given a BDD ? and a CNF formula ? for a logic
circuit C, then under a variable ordering ? and a
truth assignment A? on a certain path of ? to
the terminal, ? is satisfiable using the same
variable ordering and truth assignment.
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Relation between BDD and DP
BDD-DP Theorem For BDD ? with P paths and a CNF
formula ? for a logic circuit C then if DP
variable ordering strategy captures the same
ordering for every path of ?, then DP proves the
equivalence of C against an equivalent version in
P-1 backtracks.
1
0
1
0
0
0
0
0
1
1
1
1
0
0
1
1
1
1
0
0
Decision space of circuit I
Decision space circuit II
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Dynamic Variable Ordering for the DP Procedure
DP dynamic variable ordering strategy should
? The variable ordering strategy should differ
for every path of the decision tree
? No splitting on redundant variables
? Minimum number of splittings to reach the
terminals
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Dynamic Variable Ordering for the DP Procedure
The proposed dynamic variable ordering represent
the structural impact of every primary input of
the circuit
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Dynamic Variable Ordering for the DP Procedure
1
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Dynamic Variable Ordering for the DP Procedure
x1
1
i
x2
1
j
1
f
x3
h
x4
1
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Dynamic Variable Ordering for the DP Procedure
x1
i
x2
j
1
f
x3
1
h
x4
1
1
1
1
0
1
1
0
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BDD number of nodes and number of paths
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Experimental Results
The optimal is determined by picking the minimal
path BDD resulting from sifting
Average 90 reduction in the backtracks for the
21 functions of the ISCAS89 benchmark circuits
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Experimental Results
Experiments carried out using a Pentime 233Mhz
with 64 MB RAM
Average 70 time reduction for the hard-SAT
functions (13) of the ISCAS 89 benchmark circuits
The multiplier c6288 number of paths does not
significantly change for different variable
orderings
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Conclusions
The relation between the search tree of the DP
procedure and the BDD of the corresponding
circuit was studied
We established the relation between the number of
paths in a BDD and the corresponding number of
backtracks in the DP procedure, enabling the
calculation of optimal lower bounds
This relation enabled the inclusion of a modified
BDD variable ordering heuristic in the splitting
choice of the DP procedure
Experimental results confirm the reported
relation and demonstrate a dramatic decrease in
the number of backtracks and time need to solve
equivalence checking