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Basics of SemiconductorMEMS Fabrication

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Title: Basics of SemiconductorMEMS Fabrication


1
Basics of Semiconductor/MEMS Fabrication
  • Demetrios Papageorgiou
  • Electrical and Computer Engineering Department
  • Northeastern University

2
How it all began
  • William Shockley, John Bardeen, and Walter
    Brattain, all from Bell Labs, are credited with
    the creation of the transistor (1947).
  • It didnt look pretty

Images from Bell Labs
3
and where we are today.
4
Ingot formation
Images from www.egg.or.jp/MSIL/english/index-e.htm
l
5
Wafer slicing and polishing
Images from www.egg.or.jp/MSIL/english/index-e.htm
l
6
Now the fun begins
  • The processes available are all planar.
  • Each layer requires some combination of
    patterning, deposition/growth, and removal.
  • The combination and order determine the end
    result.

7
Patterning (Lithography)
  • The designer creates the circuit by identifying
    where material will remain and where it will be
    removed.
  • This information is then separated out by
    processing step for pattern transfer to the wafer
  • Masks
  • Contact (typically used with features greater
    than 1mm)
  • Projection (typically used with features less
    than 1mm)
  • Direct-Write
  • Uses an electron beam so they are usually part of
    a scanning electron microscope (SEM) system.
  • Typically used with features less than 100nm

8
Contact Alignment
  • The masks are used on an aligner which aligns the
    mask to the previous patterns transferred.
  • The mask is placed on the aligner, moved into the
    proper position, and brought into contact with
    the wafer.
  • An ultraviolet light then exposes the unprotected
    photosensitive material on the wafer surface.

9
Contact Alignment
  • The masks are used on an aligner which aligns the
    mask to the previous patterns transferred.
  • The mask is placed on the aligner, moved into the
    proper position, and brought into contact with
    the wafer.
  • An ultraviolet light then exposes the unprotected
    photosensitive material on the wafer surface.

alignment marks
10
Contact Alignment
  • The masks are used on an aligner which aligns the
    mask to the previous patterns transferred.
  • The mask is placed on the aligner, moved into the
    proper position, and brought into contact with
    the wafer.
  • An ultraviolet light then exposes the unprotected
    photosensitive material on the wafer surface.

11
Contact Alignment
  • The masks are used on an aligner which aligns the
    mask to the previous patterns transferred.
  • The mask is placed on the aligner, moved into the
    proper position, and brought into contact with
    the wafer.
  • An ultraviolet light then exposes the unprotected
    photosensitive material on the wafer surface.

12
Contact Alignment
  • The masks are used on an aligner which aligns the
    mask to the previous patterns transferred.
  • The mask is placed on the aligner, moved into the
    proper position, and brought into contact with
    the wafer.
  • An ultraviolet light then exposes the unprotected
    photosensitive material on the wafer surface.

13
Contact Alignment
  • The masks are used on an aligner which aligns the
    mask to the previous patterns transferred.
  • The mask is placed on the aligner, moved into the
    proper position, and brought into contact with
    the wafer.
  • An ultraviolet light then exposes the unprotected
    photosensitive material on the wafer surface.

14
Contact Alignment
  • The masks are used on an aligner which aligns the
    mask to the previous patterns transferred.
  • The mask is placed on the aligner, moved into the
    proper position, and brought into contact with
    the wafer.
  • An ultraviolet light then exposes the unprotected
    photosensitive material on the wafer surface.

15
Stepper (Projection)
  • A stepper is similar to contact aligner in that
    an ultraviolet light source is used to expose
    photoresist on the wafer surface.
  • There is no physical contact made between the
    mask and wafer. The pattern is projected onto the
    wafer surface.
  • Typically, there is a reduction in the
    magnification of the image to improve resolution.
    The image is then step-and-repeated across the
    entire wafer until it has all been exposed.

http//www.eecs.umich.edu/ssel
http//snf.stanford.edu/Equipment/ultratech/ultrat
ech.html
16
Film Growth
  • Oxidation
  • Silicon dioxide it the most common film grown in
    cleanrooms.
  • The silicon wafer is placed in a furnace
    operating between 900-1200 C and oxygen gas or
    steam are passed through the furnace.
  • Epitaxial layers
  • MBE (Molecular Beam Epitaxy) uses vapor-phase
    material which falls into place in the
    substrates crystal lattice.
  • Laser Re-Crystallization uses a laser to scan
    polycrystalline silicon on the wafer surface,
    melting it and allowing it to re-crystallize
    forming a single-crystal material matched to the
    substrate.

17
Thin-Film Deposition
  • CVD (Chemical Vapor Deposition)
  • PECVD (Plasma Enhanced CVD)
  • LPCVD (Low-Pressure CVD)
  • APCVD (Atmospheric Pressure CVD)
  • Sputtering
  • Evaporation

18
Sputtering
www.ee.ttu.edu/mems/
  • DC bias accelerates ion of an inert gas to the
    target.
  • Impact releases target atoms.
  • Relatively uniform coverage.

19
Evaporation
  • The material (metal) is heated in a vacuum.
  • Evaporation of material sends atoms out in all
    directions.
  • Non-uniform coverage.

www.ee.ttu.edu/mems/
20
Doping
  • Dopants are added to semiconductors to alter its
    electrical properties (and sometimes etch
    behavior and film stress).
  • Two/three methods used
  • Diffusion the source is placed in close
    proximity to the wafer and the temperature is
    raised.
  • Diffusion a gas which contains the dopant is run
    through the furnace at an elevated temperature.
  • Ion Implantation dopant atoms are projected at
    the wafer and become lodged in the material.

21
Etching
  • Wet
  • Dry
  • RIE (Reactive Ion Etching)
  • Ion Milling
  • CMP (Chemical Mechanical Polishing)
  • Lift-off

22
Wet Etching
  • Typically the most selective way to etch
    material.
  • Sometimes the only efficient way to etch a
    material.
  • Usually isotropic.

23
RIE (Reactive Ion Etching)
ions
Anode
feed gases
Exhaust
Ex
E-Field
absorption
desorption
Reaction with Surface
Subsequent surface reactions
Cathode
RF Power
Material removal
13.56 MHz
Straight Sidewalls
www.ee.ttu.edu/mems/Sample20Notes.ppt
24
Ion Milling
  • Semiconductor industrys version of
    sand-blasting.
  • Very unselective. (bad)
  • Can etch pretty much anything. (good)

http//www.eofoundry.com/Foundry/ion_mill.htm
25
CMP (Chemical Mechanical Polishing)
  • The name says it all polishing through chemical
    and mechanical etching.
  • Wafers mounted on a chuck and inverted.
  • The exposed surface is then placed in contact
    with a slurry-coated disk.
  • As the disk turns, the wafer surface is polished.

26
Lift-off
  • Involved deposition of metal over patterned
    photoresist followed by the dissolution of the
    photoresist.
  • Used primarily for hard to etch metals.

27
Lift-off
  • Involved deposition of metal over patterned
    photoresist followed by the dissolution of the
    photoresist.
  • Used primarily for hard to etch metals.

28
Making Integrated Circuits
29
Making Integrated Circuits
30
Making Integrated Circuits
31
Making Integrated Circuits
32
Making Integrated Circuits
33
MEMS
IC Fabrication
MEMS Fabrication
34
MEMS (Microelectromechanical Systems)
Pictures stolen from everywhere (Univ. of
Michigan, Analog Devices, Akoustica, Univ. of
Wisconsin, MEMSIC).
35
MEMS Processes
  • MEMS has branched off significantly from the IC
    industry
  • MEMS-specific equipment and processes have been
    created
  • Polyimide
  • Plastics
  • KOH
  • EDP
  • TMAH
  • SU-8
  • Foundaries have been altered and created for
    dedicated MEMS work.
  • LIGA
  • Wafer bonding
  • Supercritical CO2 Release
  • DRIE
  • XeF2 etcher
  • etc.

36
Wet Anisotropic Etch
  • Potassium Hydroxide (KOH)
  • Selective to lt111gt crystal plane
  • Very smooth sidewalls
  • Ethylenediamine Pyrocatechol (EDP)
  • Selective to lt111gt crystal plane
  • Rough surfaces
  • REALLY nasty
  • Tetramethyl Ammonium Hydroxide (TMAH)
  • Selective to lt111gt crystal plane
  • Less selective than EDP
  • A lot nicer to work with.
  • Etch rates are on the order of 7mm/min

37
Wet Anisotropic Etch
V-Groove
Anisotropic etchant
54.7
HF etch
SiO2
Si (100)
www.ee.ttu.edu/mems/Sample20Notes.ppt
38
Dry Anisotropic Etch
  • DRIE
  • Creates plasma and uses a separate power supply
    to direct ions to the wafer.
  • Capable of 5001 selectivity
  • 501 aspect ratio
  • Etch rates of 22mm/min

http//www.sensorsmag.com/
www.adixen.com
Stella Pang, Univ. of Michigan, Ann Arbor
39
Dry Isotropic Etchants
  • XeF2
  • Purely chemical etch
  • Extremely selective
  • Etch rates of 10mm/min

www.xactix.com
40
LIGA (LIthgraphie Galvanoformung Abformung)
  • Formation of patterns over a seed layer using
    x-rays to expose a thick layer of photoresist (up
    to 1mm thick).
  • Electroplating fills up openings in the
    photoresist.
  • The photoresist then removed leaving behind the
    structure which is typically used as is or then
    used as a mold.

http//www.fzk.de
41
Using a lot of these technologies
Wise, Univ. of Michigan
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