CS 2200 Lecture 02a Assessment Review

1
CS 2200 Lecture 02aAssessment Review

• (Lectures based on the work of Jay Brockman,
  Sharon Hu, Randy Katz, Peter Kogge, Bill Leahy,
  Ken MacKenzie, Richard Murphy, and Michael
  Niemier)

2
First, assessment review

• (Mainly just FYI, also to hopefully show you
  where were going in this class, what you may
  want to review a bit, etc. etc.)

3
Results

• Number of students who took the assessment

N number of students
4
Question 1
Q What do you want to do?
A (this class)
A (historically)
(kudos to the person who said Fireman)
5
Question 2

• Write a function in C called swap that will swap
  two ints
• It will be called like this
• int a 42
• int b 78
• / Call to swap goes here /
• printf("d d\n", a, b)
• The output would be
• 78 42
• Write swap here
• (This will come on the next slide!)

Note a and b are not global variables. I.e.
your function must be able to be called with
different pairs of variables.
6
Solution

• void swap(int x, int y)
• int t
• t x
• x y
• y t
• / Call... /
• swap(a, b)

Declare an integer (a.k.a. a temporary variable)
Value at address stored in x is assigned to t
Assigns the contents of the memory pointed to by
y to the contents of the memory pointer to by x
Copies t to the address pointed to by y
7
How did you do on question 2?

• The results

"this is impossible without pointers"
Lots of people don't know how pointers work!
8
Question 3

• What does a "make" do? Your answer should include
  three major items.

9
Solution

• The make program generates a sequence of commands
  for execution by the Unix shell
• Make uses a table of dependencies input by the
  programmer
• Make automatically updates files for the user
• When a change is made, make creates proper files
  with a minimum of effort
• Make has a macro facility
• name string CCgcc
• (name) (CC)

10
Wrong answers?

• Make compiles your program
• You still need a compiler (i.e. gcc)
• Make invokes the compiler
• Make cleans up your directory
• But again, the rm command would be used
• Make turns in your assignment
• Typing make does, but only to invoke commands
  within your makefile
• Make is a preprocessor
• Make is like a batch file
• Makes your life faster and easier

11
Results

• Question 3 (Make)Wide variety of answers from
  blank to pretty close.
• Many answers based on perceptions gained from
  use.

Not so good
12
Question 4

• Write 42 in binary and in hexadecimal
• Write 42.25 in binary
• (Not IEEE Floating Point)

13
Solution

• 4210 1010102 (Question A)
• 4210 2A16 0x2A (Question B)
• 42.2510 101010.012 (Question C)

(21 23 25) 42
(10160 2161) 42
Also, quick Hex review
0 0, 1 1, 2 2, 3 3, 4 4, 5 5, 6 6,
7 7, 8 8, 9 9, 10 A, 11 B, 12 C, 13
D, 14 E, 15 E, 16 F
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Results

• Question 4 (Binary/Hex numbers)

a
b
c
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Question 5

• Given a full adder as a building block

Inputs
A
B
Carry out
Carry in
Output
16
What does it do?

• Adds A, B and Carry in

Inputs
0 or 1
0 or 1
A
B
0 or 1
Carry out
Carry in
0 or 1
0 or 1
Output
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What does it do?
Inputs
A
B
Carry out
Carry in
Output
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Make an 4 bit adder
C A B
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How do we subtract?i.e. A - B

• Take the 2's complement of B and add!!!
• A B 1

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Complement?
XOR function
B
Control
x o r
C
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Can it subtract?
A0
A1
A2
A3
B0
B1
B2
B3
Control
C0
C1
C2
C3
Control Calculation 0 C A B 1 C
A - B
An initial 1
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Overflow?
23
Recall
N 3
Why -3?
Number Stored
Number Represented
Complement of 101 is 010
Adding 1 back give 011
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A quick note

• A quick note on excess notation FYI
• Case study
• To encode a number in excess-16 notation
• Add 16 to it
• Then convert the result to binary
• To convert back to decimal, convert from binary,
  then subtract 16 from the result
• Why do we do this?
• Computers are not good at storing negative
  numbers. We have to encode them
• A natural way to do this is to add a large
  amount,
• In this case 16
• Every number gets blown up into a positive
  number, then we store the positive number

i.e. -310 3 0 ? 0002
i.e. 210 3 5 ? 1012
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Consider

• 3 bit numbers
• Max allowed 3 (011)
• Min allowed -4 (100)
• 2 -2 2 -2
• 3 3 -3 -3
• 5 1 -1 -5
• 010 110 010 110
• 011 011 101 101
• 0101 1001 0111 1011
• Bad Ok Ok Bad

2s complement
C-out 0
C-out 1
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Overflow?
A0
A1
A2
A3
B0
B1
B2
B3
C0
C1
C2
C3
Control Calculation 0 C A B 1 C
A - B
(if this bit 1)
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Results

• Question 5 (Simple Arithmetic unit)

Drew 4 boxes
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Question 6

• What do you suppose this does
• load r1, 2
• load r2, 3
• add r3, r1, r2
• store r3, answer
• answer word 0

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One possibility...

• load r1, 2 Put 2 in R1
• load r2, 3 Put 3 in R2
• add r3, r1, r2 Add R1 and R2 result R3
• store r3, answer Store R3 in location
• answer
• answer word 0 Variable

Note Typically is assembly language programming
the programmer is responsible for memory use.
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Results

• Question 6 (Pseudo assembly code)

• Conclusions
• Some confusion about memory use.
• Indication that very rigid ideas exist as to
  assembler syntax.

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Question 7

• What do you think about this
• Plan createNewSelectionNode(
• Cond condition,
• char relation)
• Plan newNode
• newNode(Plan)malloc(sizeof(Plan))
• newNode-gtopSELECTION
• newNode-gtcondParams0condition
• newNode-gttableP1NULL
• newNode-gttableP2NULL
• newNode-gttable1relation
• free(newNode)
• return newNode

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Solution

• Where do you think that this question came from?
• What's the really big error?
• What will happen?
• How likely?
• What's the other evil sin?
• What might happen?
• How likely?

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Misconceptions

• free() returns NULL
• free doesn't return anything!
• free() causes an immediate core dump?
• No! The free statement is perfectly valid!
• Hardly anyone mentioned checking the return value
  from malloc!!!
• Casting return value from malloc is not illegal!
  Dates back to days before void pointers were
  invented.

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Results

• Excellent Identified errors
• consequences
• Good Identified errors
• Fair Identified free error

• Question 7 (Bad C Function)Note Wide variety
  of interpretations ofexactly what were
  implications of problem.

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Conclusions

• Many of you need a better understanding of the
  prerequisite knowledge for this course
• You will be designing control systems for digital
  logic circuits and implementing them in C
• You need to know pointers, structs, queues,
  stacks, etc. really well

36
Recommendations

• Buy Kernighan Ritchie The C Programming
  Language
• Suggestion Read the book, work the problems
• Review your 2030 stuff
• Use Appendix B in Patterson Hennessy

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CS 2200 Lecture 02bInstruction Set
Architectures (ISAs)

• (Lectures based on the work of Jay Brockman,
  Sharon Hu, Randy Katz, Peter Kogge, Bill Leahy,
  Ken MacKenzie, Richard Murphy, and Michael
  Niemier)

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First, a two slide review
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What well cover here

• Broad exposure to computer systems
• Organization of the processor
• Memory hierarchies
• Storage devices
• Parallel processors
• Networking hardware
• SW abstractions in the OS for orchestrating their
  usage
• Networking protocols to connect the computer
  system to its environment
• Major topics
• Processor, Memory Hierarchies, I/O Subsystems,
  Parallel Systems, Networking

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A summarizing picture
CS2130, CS1xxx,
ECE2030
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Second, a roadmap and background
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Our Road Map
Processor
Memory Hierarchy
I/O Subsystem
Parallel Systems
Networking
43
Five classic components (of an architecture)
Things well talk about today will deal
with datapath memory (at least indirectly!)
(i.e. well look at this part of the processor)
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What does the processor do?

• Knows where it is in program
• Can get and put data into memory
• Can do some arithmetic
• Can make tests and take different paths depending
  on the results
• Do you need a language to make a computer run?

(see board)
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A Little History

• First computers programmed by hand
• 1000110010100000
• (Logic gates are switches you can think of 1s
  and 0s as saying that a switch is on or off)
• Somewhat tedious, so invented
• Assembler
• add A,B
• Symbolic representation would be converted to 1s
  and 0s automatically
• (can do similar things like sub, xor, and, etc.)
• If we can convert from Assembly Language to
  machine code why not from some higher level
  language to Assembler?
• A B

(example AND gate)
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Back to the Instruction Set Architecture

• 1000110010100000
• Why study at this level?
• Common focal point
• Fancy way of saying that this is the 1st link
  between your C code and logic gates
• Thinking about add A, B and 1s and 0s

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Instruction Set Architecture
Another view of the previous picture
Discussion Intel machines legacies
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Instructions

• Language of the machine
• Vocabulary is the instruction set
• i.e. and, xor, store, jump, etc.
• Two levels
• Human readable
• Machine readable
• Most are similar
• What are the goals?
• (for processor design in terms of Boolean gates
  in context of ISAs)
• Note we wont get into gates too much here
  well mainly think in terms of black boxes

49
Processor Design Goals
Maximize Performance
Lets think in terms of a service analogy
Can we have them all?
Easy to build hardware
Easy to build Complier(s)
(FYI, also works with dating potential dates
are usually attractive, intelligent and available
but you can only pick 2)
You can have something fixed well, fast, and
cheap but can only pick 2.
Minimize Cost
50
Beyond Mips

• The textbook (PH) tends to focus on the design
  of the Mips processor with the eventual goal of
  producing a pipelined design (more later).
• Well do this later too
• Many other architectures have been developed and
  used over the last 50 years
• Why?
• Also, another example DLX (similar to MIPS), LC
  2200

51
First, a quick overview

• So generally were going to talk about the
  following in the next lecture or 2
• Type of ISAs and assessment techniques for them
• Where does the compiler fit in to all of this?
• A foundation ISA for other parts of this course
• Lots of ISA examples

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Instruction Set Architectures in Detail
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ISAs

• So, whats this thing called an ISA?
• Basically, the portion of machine visible to the
  programmer or compiler writer typically
  assembly code-esq.
• (And easily transferable to 1s, 0s, executables)
• How familiar are people with assembly code?
• There are lots of things to consider when
  studying or designing one
• Hows information stored in or transported to the
  CPU?
• Whats a typical workload for the machine
  designed?
• What are the performance requirements?
• Etc., etc. etc.

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Different types of ISAs

• Determined by means for storing data in CPU
• The major choices are
• A stack, an accumulator, or a set of registers
• Stack architecture
• Operands are implicitly on top of the stack
• Accumulator architecture
• One operand is in an accumulator (register) and
  the others are elsewhere
• (Essentially this is a 1 register machine)
• General purpose registers
• Operands are in registers or specific memory
  locations

55
1st, recall this picture
Well talk about stack, accumulator, and general
purpose register machines in pictures ?
particularly the datapath and memory components
(well also go through C-code to
assembly language examples too)
56
Now, what might a stack-based dataflow look like?
(see board for ex.)
Stack Pointer
Memory
PC
IR
Stack Top
Address
Why might we need all of these to form an
address???
Flag
Could do an operation with stack top and a value
from memory
1 Stack Top contains value 0 Stack Top is
empty
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What might an accumulator dataflow look like?
Who can explain how this works?
(see board for ex.)
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What might a register-based dataflow look like?
OP
i
j
k
Register Write
Memory
Multi-port Register File
Left Register Read
Right Register Read
i ? j op k
Whats wrong with this picture???
(see board for ex.)
59
Pros and cons for each ISA type
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Pros and cons for each ISA type
61
So what do people really use?

• Early machines used stack/accumulator
  architectures
• Today, general purpose register (GPR) machines
  are the norm
• Why?
• Registers are internal to CPU faster than
  memory
• Compilers can target code to register based ISA
  better
• i.e. Id rather say, ADD A, B then Push A, Push
  B, Add, Pop and no, I never liked HP
  calculators
• A segment of code like (AB) (CD) (EF)
  can be executed in any order on stack most go
  left-to-right
• Registers can hold
• Variables
• Reduce memory traffic
• Speed up program

62
So lets focus on register-based architectures

• 2 major instruction set characteristics divide
  general purpose register architectures
• (1) How many ALU operands are registers?
• Option 1 2 operand format one
  operand/register is a source and destination for
  the operation
• Option 2 3 operand format two source
  registers, one destination register
• (2) How many ALU operands are memory addresses?
• May vary from 0-to-3

63
Review (and another way of looking at different
types of architectures in code)
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Instruction Set Classification (to recap)

• One way
• Number of operands for typical arithmetic
  instruction
• add s1, s2, s3

3

• What are the possibilities?
• (well review them next in a different way than
  before)
• Will use this C statement as an example
• a b c
• Assume a, b and c are in memory

65
Zero Address Machine
0

• a.k.a. Stack Machines
• PUSH b Push b onto stack
• PUSH c Push c onto stack
• ADD Add top two items
• on stack and replace
• with sum
• POP a Remove top of stack
• and store in a

Advantages
Disadvantages
Lack of random access Efficient code hard to
get Stack if often a bottleneck
Short instructions Good code density Simple to
decode instruction
66
One Address Machine
1

• a.k.a. Accumulator Machine
• One operand is implicitly the accumulator
• LOAD b ACC ? b
• ADD c ACC ? ACC c
• STORE a a ? ACC

Advantages
Disadvantages
Minimal internal state Short instruction Simple
to decode instruction
Very high memory traffic
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Two Address Machine
21

• a.k.a. Register-Memory Instruction Set
• One operand may be a value from memory
• (unlike the Mips architecture discussed in your
  book)
• (and that well learn more about here)
• Machine has n general purpose registers
• 0 through n-1
• LOAD 1, b 1 ? Mb
• ADD 1, c 1 ? 1 Mc
• STORE 1, a Ma ? 1

Advantages
Disadvantages
Data accessible without loading Inst. format easy
to encode Inst. format good density
Operands not equivalent Source operand in binary
operation is destroyed
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Two Address Machine
22

• a.k.a. Memory-Memory Machine
• Another possibility do stuff in memory!
• These machines have registers used to compute
  memory addresses
• MOVE a, b Ma ? Mb
• ADD a, c Ma ? Ma Mc

Advantages
Disadvantages
Most compact Doesnt waste reg. for temps.
Memory accesses create bottlenecks
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Two Address Machine
23

• a.k.a. Load-Store Instruction Set or
  Register-Register Instruction Set
• Typically can only access memory using load/store
  instructions
• LOAD 1, b 1 ? Mb
• LOAD 2, c 2 ? Mc
• ADD 1, 2 1 ? 1 2
• STORE 1, a Ma ? 1

Advantages
Disadvantages
Data accessible without loading Inst. format easy
to encode Inst. format good density
Operands not equivalent Source operand in binary
operation is destroyed
70
Three Address Machine
3

• a.k.a. Load-Store Instruction Set or
  Register-Register Instruction Set
• Typically can only access memory using load/store
  instructions
• LOAD 1, b 1 ? Mb
• LOAD 2, c 2 ? Mc
• ADD 3, 1, 2 3 ? 1 2
• STORE 3, a Ma ? 3

Advantages
Disadvantages
Simple, fixed length instructions Simple code
generation model Similar of clock cycles to
exec.
Higher instruction counts
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History
Hardware Expensive Memory Expensive Accumulators
EDSAC IBM 701
Hardware Less Expensive Memory Expensive Register
Oriented Machines (2 address) Register-Memory
IBM 360 DEC PDP-11 Also Fringe
Element Stack Machines Burroughs B-5000
(Banks)
Hardware Memory Cheap Microprocessors Compilers
get good CISC VAX Motorola 68000
Intel 80x86 RISC Berkley RISC ?Sparc
Dave Patterson Stanford MIPS ?SGI John
Hennessy IBM 801
1940 1950
1960 1970
1980 1990
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Next

• Well focus on register, register machines
• (why learn a lot about something from the 1960s?)
• In particular, well present a MIPS, DLX view
• Later, well look at the LC 2200
• The LC 2200 is a simple machine that youll use
  for lots of projects and HWs.
• Ill often present concepts in terms of the
  LC2200 hopefully this should help with
  HWs/projects

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Where is all of the data that we need to use in
instructions?
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Some example RISC instructions
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Typical Operation

• add a,b,c a b c
• What if we want to do a bcde?
• (Try it!)

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Typical Operation

• add a,b,c a b c
• What if we want to do a bcde?
• (Try it!)
• add a,b,c
• add a,a,d
• add a,a,e

Class exercise Do this with the fewest number
of instructions and registers. (Assume a
load/store machine)
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Whats the answer?

• (56) - (34)
• How did you do it?

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Whats the answer?

• (56) - (34)
• How did you do it?
• e (ab) - (cd)
• add t1,a,b
• add t2,c,d
• sub e,t1,t2

Class exercise Do this with the fewest number
of instructions and registers. (Assume a
load/store machine)
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Operands

• add a,b,c
• Where are a, b and c?
• Memory?
• I/O Device?
• Registers (in processor)?
• ???
• How does the data get in and out of the
  registers?
• load
• store

80
What about memory addresses?

• Usually instruction sets are byte addressed
• Provide access for bytes (8 bits), half-words (16
  bits), words (32 bits), double words (64 bits)
• Two different ordering types big/little endian

31
23
15
7
0
Little Endian
Puts byte w/addr. xx00 at least significant
position in the word
31
23
15
7
0
Big Endian
Puts byte w/addr. xx00 at most significant
position in the word
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Another view of Endianess

• No, were not making this up.
• at word address 100 (assume a 4-byte word)
• long a 0x11223344
• big-endian (MSB at word address) layout
• 100 101 102 103
• 100 11 22 33 44
• 0 1 2 3
• little-endian (LSB at word address) layout
• 103 102 101 100
• 11 22 33 44 100
• 3 2 1 0

82
Another example

• Consider string layout starting at word addr
  100
• char a12 RAMACHANDRAN
• char b12 WAMACHANDRAN

Big Endian
Little Endian
83
Memory addressing modes

• Refers to how architectures specify the address
  of an object they will access
• Fancy language for
• How do we tell the processor address to access in
  memory?
• In GPR machines, addressing mode can specify a
  constant, register or location in memory
• When memory location is used, actual memory
  address specified in the addressing mode is
  called the effective address
• Next, we summarize different types of addressing
  modes (excluding PC relative)

84
Addressing Modes
85
Addressing modes continued
86
Addressing modes Final thoughts

• A new architecture would most likely have at
  least displacement, immediate, and register
  deferred in addition to register obviously
• For example
• An Example MIPS machine

87
An example MIPS machine
FYI, designing something like this (that
executes instructions) will be a big focus of the
1st part of this class.
You dont have to understand this now, but lets
walk through whats here
88
Types of instructions and how theyre used
89
Instruction Classes

• Weve talked lots about instructions, instruction
  counts, but what are they really?
• Lets look at some basic instruction classes
• Arithmetic/Logical AND, OR, add, sub
• Data Transfer Loads/Stores, move inst.
  (machines
• w/addressable memory)
• Control Branch, jump, procedure call return,
  traps
• System OP Sys. calls, virtual memory management
• Floating Point Floating point ops multiply and
  divide
• Decimal Dec. add, multiply dec.-to-char.
  conversions
• String String move, compare, search
• Graphics Pixel ops, compression/decompression

90
What instructions are really used?

• Usually the most commonly executed instructions
  are the simple ones
• For example consider this Intel 80x86 mix

These 10 instructions make up 96 of all those
executed!
91
How does code translate to instuctions?

• g h A8
• load s0,8(s3)
• actually
• lw s0,8(s3) lw dest, offset(base)
• add s1, s2, s0 add dst, src1, src2
• Notice Registers contain data or addresses!!

92
Perception Check

• What exactly are we doing?
• HLL (C) ? Assembler
• Assembler ? Machine Instructions
• Goals
• See how HLL translate to Assembler
• Understand hardware designs, constraints, goals,
  etc.

93
Slightly more complex

• A12 h A8
• Compile it?
• lw s0, 8(s3)
• add s0, s2, s0
• sw s0, 12(s3)

94
Historical Note

• Early machines often had a register called an
  index register
• load addr(index)
• Address space was small
• Today
• lw s1, offset(base)
• Base address are much larger...need to be in a
  register
• Often offsets are small but if not...

95
Variable Array Index?

• g h Ai

96
Variable Array Index?

• g h Ai
• add a0, s2, s3 i addr(A)
• lw a1, 0(a0) a1 ? Ai
• add s0, s1, a1 g ? h Ai

97
Flashback How many registers?

• Early machines had about 1 (Accumulator)
• PDP-11 series had 8
• Typical 32 bit processors today have 32.
• Why not more?
• What happens when there are more variables than
  registers?
• Spillage Putting less commonly used variables
  back into memory.

98
Note the speed

• Register ops access two regs and perform an
  operation
• Memory ops access one location and dont do
  anything to it!
• What do you think about the speed of memory
  versus registers?

99
Mips Register Conventions
Name
R
Usage
Preserved on call
zero
0
The constant value 0
n.a.
at
1
Reserved for assembler
n.a.
v0-v1
2-3
Values for results and expression evaluation
no
a0-a3
4-7
Arguments
no
t0-t7
8-15
Temporaries
no
s0-s7
16-23
Saved
yes
t8-t9
24-25
More temporaries
no
k0-k1
26-27
Reserved for use by operating system
n.a.
gp
28
Global pointer
yes
sp
29
Stack pointer
yes
fp
30
Frame pointer
yes
ra
31
Return address
yes
100
LC2200 Register Conventions
Name
R
Usage
Preserved on Call
zero
0
The constant value 0
n.a.
at
1
Reserved for assembler
n.a.
v0
2
Return value
no
a0-a4
3-7
Argument or temporary
no
s0-s3
8-11
Saved general purpose registers
yes
k0
12
Reserved for OS/traps
n.a.
sp
13
Stack pointer
yes
fp
14
Frame pointer
yes
ra
15
Return address
yes
101
CS 2200 Lecture 2cInstruction Set
Architectures (ISAs)(with a special focus on
control instructions)

• (Lectures based on the work of Jay Brockman,
  Sharon Hu, Randy Katz, Peter Kogge, Bill Leahy,
  Ken MacKenzie, Richard Murphy, and Michael
  Niemier)

102
Decisions, decisions...

• The affects of branch instructions are a big
  source of research in computer architecture
• In this class
• Jump will refer to unconditional changes in
  control
• Branch will refer to conditional changes in
  control
• And there are 4 main types of control-flow
  change
• Conditional branches (most frequent)
• Jumps
• Procedure calls
• Procedure returns

103
which break down like this
s for benchmark Suite on load/store machine
104
Kinds of branch instructions
105
Where jumps and branches go

• Always to some specified destination address
• Most often, address is specified in instruction
• Procedure return is an exception however
• (Return target is not known at compile time)
• Usually, address specified relative to the PC
• PC Program Counter indexes executing
  instructions
• Control instructions specified as such are
  PC-relative
• Good b/c target often near current instruction
  (indexed by PC) specified by fewer bits
• Allows for position independence program can
  run independently of where its loaded

106
Target Unknown

• So what about these unknown addresses?
• Target NOT known at compile time
• Cant use PC relative must specify target
  dynamically so we can change it at runtime
• Some options
• Put target address in a register
• Let jump permit any addr. mode to supply target
  address
• Register indirect jumps useful for following
  constructs
• Case/Switch select among one of several
  alternatives
• Dynamically shared libraries library loaded
  when invoked
• No compile time target load from memory with
  register indirect jump

107
Some basic branch facts

• Branches usually use PC-relative addressing
• But how far is target from instruction?
• The answer to this question will tell us
• Which branch offsets to support
• How long an instruction is/how it should be
  encoded
• Note the gory interdependencies!!!
• Most branches are in the forward direction and
  only 4-7 instructions away
• Short displacement should suffice
• increased code density w/shorter instructions

108
How do we know where to go?
Often branch is simple inequality test or
compares with 0 architectures make this is a
special case and make it fast!
109
if statement

• if (i j) goto L1
• f g h
• L1 f f - i
• beq s3, a4, L1 if ij goto L1
• add s0, s1, s2 f g h
• L1 sub s0, s0, s3 f f - i

110
Did we just use a go to???
111
if statement

• if (i ! j)
• f g h
• f f - i

112
if statement

• if (i ! j)
• f g h
• f f - i
• beq s3, a4, L1
• add s0, s1, s2
• L1 sub s0, s0, s3

113
if-then-else

• if (i j)
• f g h
• else
• f g
• beq s3, a4, Then if opp is T
• add s0, s1, zero f g h
• beq zero, zero, Exit
• Then add s0, s1, s2 f g h
• Exit

reg
contents
s0
f
s1
g
s2
h
s3
i
a4
j
The LC2200 has no BNE
114
Loop with Variable Array Index

• Loop g g Ai
• i i j
• if (i ! h) goto Loop

reg
contents
s0
g
s1
h
s2
i
s3
j
Loop add a1, s2, a0 lw a1,
0(a1) add s0, s0, a1 add
s2, s2, s3 beq s2, s1, Exit
beq zero, zero, Loop Exit
a0
addr of A
Plus some temps
115
While Loop
reg
contents

• while (savi k)
• i i j
• Loop add a1, s1, s0
• lw a2, 0(a1)
• beq a2, s3, Skip
• beq zero, zero, Exit
• Skip add s1, s1, s2
• beq zero, zero, Loop
• Exit

s0
addr(sav)
s1
i
s2
j
s3
k
a1
temp
a2
temp
116
Case/Switch

• switch (k)
• case 0 f i j break
• case 1 f g h break
• case 2 f g - h break
• case 3 f i - j break
• slt t3, s5, zero If k lt 0
• bne t3, zero, Exit Exit
• slt t3, s5, t2 If k gt 4
• beq t3, zero, Exit Exit
• add t1, s5, s5 mpy k by 4
• add t1, t1, t1

Mips
117
Case/Switchcontinued

• switch (k)
• case 0 f i j break
• case 1 f g h break
• case 2 f g - h break
• case 3 f i - j break

Jmptbl Address(L0) Address(L1) Address(L2)
Address(L3)
118
Case/Switchcontinued

• switch (k)
• case 0 f i j break
• case 1 f g h break
• case 2 f g - h break
• case 3 f i - j break

add t1, t1, t4 t1 Jmptabk lw t0,
0(t1) jr t0 jump based
on reg t0 L0 add s0, s3, s4 j
Exit etc...