Stanford

1
Stanford µSequencer

• December 2003

2
Motivation

• Control, initialization, and constant maintenance
  of Avalon peripherals
• Perfectly deterministic
• Microprocessor is larger than necessary for these
  tasks
• Engineering a custom state machine increases
  time-to-market
• Avalon MicroSequencer provides a solution
• Configurable, programmable state sequencer that
  fits into the Avalon bus fabric
• Leverages all the benefits of SOPC Builder

3
Configuration Options

• Size of the Instruction ROM
• Words or K words
• 36-bit Instruction words
• Implemented in Stratix/Cyclone synchronous RAM
  blocks
• Optional 32-bit accumulator register
• For loop counting, memory indexing, etc.

4
Software Build Tab

• Automated generation of memory files for
  Instruction ROM
• .mif (Quartus compilation)
• .dat (Verilog simulation)
• .hex (VHDL simulation)
• Files placed in system directory
• Software can also be built by an external Perl
  script.

5
Sequencer Architecture
(base configuration)
OPCODE DATA ROM
COND_BIT
IP


1
OP CODE
DATA

Execution Controller
DATA_REG
Address
WR Data
RD Data
DATA_REG - a 32-bit wide register IP -
instruction pointer COND_BIT - condition code bit
Avalon Master
6
Sequencer Architecture
(with accumulator register)
OPCODE DATA ROM
COND_BIT
IP


1
OP CODE
DATA


CNT_REG
Execution Controller
DATA_REG
Address
WR Data
RD Data
DATA_REG - a 32-bit wide register IP -
instruction pointer COND_BIT - condition code
bit CNT_REG - 32-bit accumulator
Avalon Master
7
Sequencer Instructions
(base configuration)
LD(data) - DATA_REG data WR(addr) - Avalon
Write (addr) DATA_REG RD(addr) - Avalon
Read DATA_REG (addr) AND(data) - DATA_REG
data OR(data) - DATA_REG data CMP(data) -
(DATA_REG data) ? (COND_BIT 1) (COND_BIT
0) JMP(true_off, false_off) - ((COND_BIT) ?
(IPtrue_off) (IPfalse_off)) Note these
instructions are implemented as C macros, so the
state machine definition is actually written in
C, which means that you can leverage the C
language to do very complex things if you are so
motivated. Please see the example state machine
definitions that are output in the components SDK
for examples on how to use these instructions in
an actual state machine.
8
Additional Instructions
(supported when configured with accumulator
register)
LDC(data) - CNT_REG data INC(data) -
CNT_REG data WRC() - Avalon Write
(CNT_REG) DATA_REG RDC() - Avalon Read
DATA_REG (CNT_REG) CMPC(data) - (CNT_REG
data) ? (COND_BIT 1) (COND_BIT 0) CPC()
- DATA_REG CNT_REG Note these
instructions are implemented as C macros, so the
state machine definition is actually written in
C, which means that you can leverage the C
language to do very complex things if you are so
motivated. Please see the example state machine
definitions that are output in the components SDK
for examples on how to use these instructions in
an actual state machine.
9
OPCODE/DATA Word Format
36-bit ROM Word
OPCODE
DATA
32-bit DATA
4-bit OPCODE
10
Design Flow
Quartus Smart Compile will skip the Analyzer and
Fitter stages of compilation if only the MIF file
has changed since the last full compile! (MIF
file must be added to the project for this to
work)
11
Performance

• Approximately 130 LEs
• 270 with accumulator register
• Using physical synthesis options in Quartus, we
  achieved fmax as high as 235 MHz on a Stratix
  1S10 device, -5 speed grade
• Configuration with accumulator runs at 200 MHz.
• Executes nearly one instruction per cycle
• Three exceptions
• One cycle delay before executing first
  instruction
• One cycle delay after each jump (NOP inserted by
  compiler)
• Avalon read/write instructions require sequencer
  to wait for transfer

12
Installation Package

• InstallShield Package contains everything
  necessary to begin developing with the Avalon
  MicroSequencer
• SOPC Builder component class, HDL generator,
  sample SDK
• GCC and associated Cygwin packages (for microcode
  builder) are added to the existing SOPC Builder
  installation of Cygwin
• Avalon MicroSequencer Kit
• Preliminary Datasheet
• Four example/demonstration designs
• Tutorial with detailed instructions, summary
  readme, and starter projects

Note The installation package should be used
with Quartus II 4.0.