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Smart Surge Protector

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A smart surge protection device that reports the status of the surge protection ... protection devices reduce or attenuate transients and limit the surges reaching the ... – PowerPoint PPT presentation

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Title: Smart Surge Protector


1
Smart Surge Protector
  • Team Members
  • Jason Long Billy Gates, Jr.
  • Professor Stephen E. Saddow, Advisor

2
Motivation
  • Most residential surge protection devices fail
    without warning.
  • Some have indicator lights that are difficult to
    see.
  • A smart surge protection device that reports the
    status of the surge protection element (varistor)
    to the user via a computer interface.
  • A GUI (Graphic User Interface) will be used to
    report the status to the user after reading the
    status of the monitoring circuit.

3
Team Members
Dr. S. E. Saddow
JasonLong
Billy J Gates,Jr.
4
Team Organization
  • Billy J Gates, Jr.
  • Monitoring interface Presentation organization
  • Computer program
  • Web Page
  • Executive Summary
  • Test Specifications
  • Objective
  • Jason Long
  • Requirements
  • Objectives
  • References
  • Web Page
  • Problem Statement
  • Surge Protection circuit

5
How to observe the protection device state?
  • 1. LEDs
  • Are not always visible to user
  • 2. Alarms
  • Are often ignored by user
  • 3. Our design
  • Give the user a computer prompt of the
    status of
  • the device as it reaches the end of its
    lifetime.

6
Abstract
  • A monitoring surge protection device that reports
    the status of the surge protection circuit
    (varistor) to the computer.
  • A GUI (Graphic User Interface) will be used to
    report the status to the user, by reading the
    status of the monitoring circuit.

7
Objective
  •  
  • 1. Test Source voltages The Surge
    Protection Device (SPD) will operate from any
  • standard 125V three-prong receptacle
    outlet that is designed for 120 VAC 60Hz.
  •  
  • 2. Fire Standards The device will meet all
    the National Fire and Safety Code and the
  • National Electrical Codes.
  •  
  • 3. Physical Packaging We are not so much
    concerned with the physical packaging at
  • the moment, although we know the design
    will be contained in a molded plastic case.
  • The main concern will be getting the
    design to work.
  •  
  • 4. Monitoring Time We will check the
    status of the varistor for any changes caused by
  • an over-voltage or over-current every
    1?s.

8
Objective
  • 5. Transient Voltage Surge
    Suppression The SPD will be designed to suppress
    a
  • continuous transient voltage of 135V
    AC.
  • 6. Clamping Voltage Clamping is the
    term used for the process whereby surge
  • protection devices reduce or
    attenuate transients and limit the surges
    reaching the
  • protected load to a specific lower
    voltage level. The lowest clamping voltage
    recognized
  • by United Laboratories (UL) is 330 V
    in the UL1449 standard. Rise time for the
    voltage
  • must be within the 8?s
    (microseconds), and with a 20?s trail off.
  •   
  • 7. Peak transient current The SPD will
    be able to handle a peak transient voltage of
  • 1200 Amps. Rise time for the current
    must be within the 8?s (microseconds), and with a
  • 20?s trail off.
  •  

9
Objective

8.  Operation Indicator (Graphical User
Interface) Our SPD operation indicator will
be a graphical user interface. The
graphical user interface will give the user the
number of times the SPD has been placed
in it protection mode (against over-
voltage and over-currents) and the number of
times the SPD has before the device
fails. This information will be gather via a
RS-232 serial port. 9.  Surge Protection
The SPD will protect against transient voltage
surges line to neutral, line to
ground, and neutral to ground.   10.
Measuring circuit This circuit will trigger if
an over-current or over- voltage
thru the varistor. Triggering a counter that will
hold the number of times the
varistor has been activated for protection. We
will use a battery to power the
counter in the event of power loss.
8.  
10
Approach
  • Computer Program
  • C
  • Simulation
  • PSPICE Electronics Workbench
  • Hardware
  • Varistor
  • RS-232 interface
  • counter

11
Design
MONITORING CIRCUIT
1000 V, 100A 100 KHZ
PEARSON COIL
355 V CLAMPING LEVEL
L
RESISDUAL TRAVELS ON TO LOAD
TRANSIENT CURRENT IS SHUNTED L-N BY SPD COMPONENT
LOAD
SINGLE SPD COMPONENT
ENERGY DISAPATED AS HEAT DURING CLAMP
TRANSIENT RESIDUAL SHUNTED TO NEUTRAL
N
G
12
Design
SMART SURGE PROTECTION DEVICE
METAL OXIDE VARISTOR
GRAPHICAL USER INTERFACE
4.    
PEARSON COILS AND COMPARITOR
C COMPUTER PROGRAM
SURGE MONITORING CIRCUIT
RS-232 PORT
13
Design
4.    
Surge Protector
Monitor circuit
Computer
14
Design
  • Surge Protection device
  • This part of the circuit will consist of a
    varistor that will go into its active
  • mode when an over-voltage or over-current
    occurs.
  • Monitoring Circuit
  • This part of the will trigger when a
    over-voltage or over-current occurs.
  • To detect the over-voltage or over-current will
    sample the operation of
  • the varistor when it is in its active mode.
  • Counter
  • The counter will be incremented each time the
    varistor is in it active
  • mode.
  • Computer Program(GUI)
  • The program will have a preset value for the
    counter and it will check the counter
  • for the maximum allowed count and warn the user
    by prompting the user with a
  • visible icon on the computer screen.

15
Design
Maximum Continuous Voltage RMS 135 Vac,
Maximum Transient Energy 10 Joules Peak
Transient Current 1200 amps, Maximum Clamping
Voltage 355 V, Transient Power Dissipation
.25 W
METAL OXIDE VARISTOR
PEARSON COIL
Maximum Peak Current 2000 amps, Useable Rise
Time 20ns Maximum RMS Current 25 amps
SURGE MONITORING CIRCUIT
Op-amp, comparator, and current meter This part
of the will trigger when a over-voltage or
over-current occurs. To detect the over-voltage
or over-current will sample the operation of the
varistor when it is in its active mode.
GRAPHICAL USER INTERFACE
C Program The program will have a preset value
for the counter and it will check the counter for
the maximum allowed count and warn the user by
prompting the user with a visible icon on the
computer screen.
16
Test Specifications
  • Circuit Simulations
  • Used to test component design
  • Software
  • Software used to check the status of device

17
Test Specification
18
Acknowledgements
  • We would like to thank Dr. Stan Saddow, our
    advisor for his help in our design project.

19
References
  • 1 K. Lahti, K. Kannus, K. Nousiainen,
    Comparison between the DC leakage currents of
    polymer housed metal oxide surge arresters in
    very humid ambient conditions and in water
    immersion tests, IEEE Transactions on Power
    Delivery,
  • vol. 14, no. 1, pp. 163-168, Jan 1999.
  •  
  • 2 P. M. Wherett, C. J. Kossman, J. R. Gumley,
    New techniques for designing surge protection
    devices, Journal of Electrical and Electronics
    Engineering, Austraila, vol. 19, no.1, pp. 45-50,
    1999
  •  
  • 3 M. Akbar, A. Monir, Failure study of
    metal-oxide surge arrestors, Electric Power
    Systems Research, vol. 50, no.2, pp. 79-82, 1999
  •  
  • 4 M. Aceves, J. Pedraza, J. A.
    Reynoso-Hernandez, C. Falcony, W. Calleja, Study
    on Al/silicon rich oxide/Si structure as a surge
    suppressor, DC, frequency response and modeling,
    Microelectronics Journal, vol. 30, no. 9, pp.
    855-862, 1999.
  •  
  • 5 T. A. Short, R.H. Ammon, Monitoring results
    of the effectiveness of surge arrester spacings
    on distribution line protection. IEEE
    Transactions on Power Delivery, vol. 14, no.3,
    pp. 1142-1150, 1999.
  •  
  • 6 D. R. Miller, J. J. Woodworth, C. W. Daley,
    Watts loss of polymer housed surge arresters in
    a simulated Florida coastal climate, IEEE
    Transactions on Power Delivery, vol. 14, no. 3,
    pp. 940-947, 1999.
  •  
  • 7 A. Piantini, C. V. S. Malagodi, Voltage
    surges transferred to the secondary of
    distribution transformers, IEE Conference
    Publication, vol. 1, no. 467, pp.
    1.365.P6-1.368.P6, 1999.
  •  
  • 8 H. Sugimoto, A. Asakawa, S. Yokoyama, K.
    Nakada, Effectiveness of installing two pairs of
    distribution surge arrestors in parallel, IEE
    Conference Publication, vol. 2, no. 467,
    pp.2.246.S13-2.249.S13, 1999.
  •  
  • 9 F. Perrot, Efficient method to characterize
    the performance of metal oxide varistors, IEE
    Conference Publication, vol.2, no. 467, pp.
    2.305.P1-2.308.P1, 1999.
  •  
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