Lecture 6: InterProcess Communication IPC Chapters 2'2'12'2'3 textbook

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Lecture 6 InterProcess Communication (IPC)
Chapters 2.2.1-2.2.3 textbook
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Inter-process Communication

• Three objectives
• Passing information from one process to another
• Making sure two processes dont get into each
  others way (e.g., trying to grab the last 1MB of
  memory)
• Making sure the proper sequencing is implemented
  (e.g., if process A produces data used by process
  B, B should not start using the data before A
  finishes producing it).
• Discussion applies to threads as well (except 1).

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Race Condition
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Critical Region

• Mutual exclusion using critical regions

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Inter-process Communication (IPC)

• Definitions
• Race Conditions two or more processes are
  reading and writing on shared data and the final
  result depends on who runs precisely when
• Mutual exclusion making sure that if one
  process is accessing a shared memory, the other
  will be excluded from doing the same thing
• Critical region the part of the program where
  shared variables are accessed

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Requirements for Correct Mutual Exclusion?
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Mutual Exclusion

• Four conditions to provide CORRECT mutual
  exclusion
• No two processes simultaneously in critical
  region
• No assumptions made about speeds or numbers of
  CPUs
• No process running outside its critical region
  may block another process
• No process must wait forever to enter its
  critical region

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Mutual Exclusion Your Ideas?
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Mutual Exclusion

• Idea 1 Disabling Interrupts
• Busy waiting testing a variable until some value
  appears
• Idea 2 Lock Variables
• Idea 3 Strict Alternation
• Idea 4 Petersons
• Idea 5 Test and Set Lock
• Sleep and wakeup
• Semaphores, mutexes
• Monitors
• Message passing

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Mutual ExclusionIdea 1 Disabling Interrupts

• Process disables all interrupts before entering
  its critical region
• (CPU is switched between processes only as a
  result of interrupts)
• Enables all interrupts just before leaving its
  critical region
• So disabling interrupts guarantees that there
  will be no process switch
• Disadvantage
• Should give the power to control interrupts to
  user (what if a user turns off the interrupts and
  never turns them on again?)
• Does not work in case of multiple CPUs. Only the
  CPU that executes the disable instruction is
  affected.
• Not suitable approach for the general case but
  can be used by the Kernel when needed