Encoders

1
Encoders

• Module M9.3
• Section 6.3

2
Encoders

• Encoders
• Priority Encoders
• TTL Encoders

3
Encoders
I0 I1 I2 I3 B A
1 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 1
0 0 0 0 1 1 1
4
Encoders
Assume only 1 input can be high at any time.
I0 I1 I2 I3 B A
1 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 1
0 0 0 0 1 1 1
A I1 I3 B I2 I3
5
8-to-3 Encoder
Y2 I7 I6 I5 I4 Y1 I7 I6 I3 I2 Y0
I7 I5 I3 I1
6
encoder.abl
MODULE encoder83 TITLE 'Encoder, D. Hanna,
7/15/02' DECLARATIONS " INPUT PINS " I7..I0 PIN
6, 7, 11, 5, 72, 71, 66, 70 " Switch 1..8 "
OUTPUT PINS " Y2..Y0 PIN 37, 36, 35 ISTYPE 'com'
" LED 6..8 EQUATIONS Y2 I7 I6 I5
I4 Y1 I7 I6 I3 I2 Y0 I7 I5 I3
I1 END encoder83
7
Priority Encoder
I0 I1 I2 I3 I4 I5 I6 I7 Y2
Y1 Y0
1 0 0 0 0 0 0 0 0 0 0 X 1 0 0 0 0
0 0 0 0 1 X X 1 0 0 0 0 0 0 1 0 X
X X 1 0 0 0 0 0 1 1 X X X X 1 0 0
0 1 0 0 X X X X X 1 0 0 1 0 1 X X
X X X X 1 0 1 1 0 X X X X X X X 1
1 1 1
8
Priority Encoder
I0 I1 I2 I3 I4 I5 I6 I7 Y2
Y1 Y0
1 0 0 0 0 0 0 0 0 0 0 X 1 0 0 0 0
0 0 0 0 1 X X 1 0 0 0 0 0 0 1 0 X
X X 1 0 0 0 0 0 1 1 X X X X 1 0 0
0 1 0 0 X X X X X 1 0 0 1 0 1 X X
X X X X 1 0 1 1 0 X X X X X X X 1
1 1 1
Y2 L7 L6 L5 L4
L7 I7 L6 !I7 I6 L5 !I7 !I6 I5 L4
!I7 !I6 !I5 I4
9
Priority Encoder
I0 I1 I2 I3 I4 I5 I6 I7 Y2
Y1 Y0
1 0 0 0 0 0 0 0 0 0 0 X 1 0 0 0 0
0 0 0 0 1 X X 1 0 0 0 0 0 0 1 0 X
X X 1 0 0 0 0 0 1 1 X X X X 1 0 0
0 1 0 0 X X X X X 1 0 0 1 0 1 X X
X X X X 1 0 1 1 0 X X X X X X X 1
1 1 1
Y1 L7 L6 L3 L2
L7 I7 L6 !I7 I6 L3 !I7 !I6 !I5 !I4
I3 L2 !I7 !I6 !I5 !I4 !I3 I2
10
Priority Encoder
I0 I1 I2 I3 I4 I5 I6 I7 Y2
Y1 Y0
1 0 0 0 0 0 0 0 0 0 0 X 1 0 0 0 0
0 0 0 0 1 X X 1 0 0 0 0 0 0 1 0 X
X X 1 0 0 0 0 0 1 1 X X X X 1 0 0
0 1 0 0 X X X X X 1 0 0 1 0 1 X X
X X X X 1 0 1 1 0 X X X X X X X 1
1 1 1
Y0 L7 L5 L3 L1
L7 I7 L5 !I7 !I6 I5 L3 !I7 !I6 !I5
!I4 I3 L1 !I7 !I6 !I5 !I4 !I3 !I2
I1
11
pencoder.abl
MODULE pencoder83 TITLE 'Priority Encoder, A.
Student, 7/15/02' DECLARATIONS " INPUT PINS
" I7..I0 PIN 6, 7, 11, 5, 72, 71, 66, 70 "
Switch 1..8 " OUTPUT PINS " Y2..Y0 PIN 37, 36, 35
ISTYPE 'com' " LED 6..8 VALID PIN 44 " LED
1 " VALID 1 for valid binary output "
INTERMEDIATE NODES " L7..L0 NODE ISTYPE 'com'
" internal vector
12
pencoder.abl (contd)
EQUATIONS L7 I7 L6 !I7 I6 L5 !I7
!I6 I5 L4 !I7 !I6 !I5 I4 L3 !I7
!I6 !I5 !I4 I3 L2 !I7 !I6 !I5 !I4
!I3 I2 L1 !I7 !I6 !I5 !I4 !I3
!I2 I1 Y2 L7 L6 L5 L4 Y1 L7 L6
L3 L2 Y0 L7 L5 L3 L1 END pencoder83
13
TTL Encoder
EI 0 1 2 3 4 5 6
7 A2 A1 A0 GS EO
1 X X X X X X X X 1 1 1 1 1 0 1
1 1 1 1 1 1 1 1 1 1 1 0 0 X X X X
X X X 0 0 0 0 0 1 0 X X X X X X 0
1 0 0 1 0 1 0 X X X X X 0 1 1 0 1
0 0 1 0 X X X X 0 1 1 1 0 1 1 0
1 0 X X X 0 1 1 1 1 1 0 0 0 1 0 X
X 0 1 1 1 1 1 1 0 1 0 1 0 X 0 1
1 1 1 1 1 1 1 0 0 1 0 0 1 1 1 1 1
1 1 1 1 1 0 1
Priority Encoder
14
(No Transcript)
15
68000 Interrupt Logic
A0 A1 A2
74138 Decoder
68000
IRQA
IP0 IP1 IP2
74148 Encoder
Peripheral
IRQ
Data Bus