ECE2030 Introduction to Computer Engineering Lecture 1

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ECE2030 Introduction to Computer
EngineeringLecture 9 Combinational Logic,
Mixed Logic
Prof. Hsien-Hsin Sean Lee School of Electrical
and Computer Engineering Georgia Tech
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Logic Design

• Logic circuits
• Combinational
• Sequential

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Combinational Logic

• Outputs, at any time, are determined by the
  input combination
• When input changed, output changed immediately
• Note that real circuits are imperfect and have
  propagation delay
• A combinational circuit
• Performs logic operations that can be specified
  by a set of Boolean expressions
• Can be built hierarchically

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Design Hierarchy Example
9-input Odd Function
X0
X1
9-input Odd Function
X2
Z
X3
X4
X5
X6
X7
X8
Function Specification To detect odd number of
1 inputs, i.e. Z1 when there is an odd
number of 1 present in the inputs
How to design a 3-input Odd Function?
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Derive Truth Table for Desired Functionality
A B C F
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1
BC
00 01 11 10
0 0 1 0 1
1 1 0 1 0
A
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Design Hierarchy Example
9-input Odd Function
X0
X1
9-input Odd Function
X2
Z
X3
X4
X5
X6
X7
X8
3-input Odd function B0A0??A1?A2
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Combinational Logic Design Example
F
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Mixed Logic

• Enable component reuse
• Allow a digital logic circuit designer to
  implement a combinational logic with
• Only NAND gates
• Only NOR gates
• Only NAND and NOR gates

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DeMorgans Law
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Mixed Logic (1)

• Implement all ORs in the Boolean function
• Implement all ANDs in the Boolean function
• Forget all the inversion at this moment

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Example Mixed Logic (1)
B
C
A
D
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Mixed Logic (2)

• Draw Vertical Bars in the circuits where all
  complements in the Boolean equation occur
• Draw a bubble on each Vertical Bar

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Example Mixed Logic (2)
B
C
A
D
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Mixed Logic (3)

• Convert each gate to the desired gate
• If only NAND gate is available, insert a bubble
  in front of the AND gate
• If only OR gate is available, insert a bubble in
  front of the OR gate
• Using DeMorgans Law in the process
• OR ? NAND by adding 2 bubbles on the inputs side
  of OR
• AND ? NOR by adding 2 bubbles on the inputs side
  of the AND

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Example Mixed Logic (3)
Assume this design uses NAND gates only
B
C
A
D
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Mixed Logic (4)

• Balance the bubbles on each wire, i.e. even out
  the number of bubbles on every wire
• If there is odd number of bubbles on a wire, add
  an inverter (i.e. a bubble)
• And remove those vertical bars with bubbles
  which are used to help only, not in the circuits

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Example Mixed Logic (4)
Assume this design uses NAND gates only
B
C
A
D
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How about Inverters?

• Inverters can be implemented by either a NAND or
  a NOR gate
• Wiring the inputs together

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Example Mixed Logic (Final)
Assume this design uses NAND gates only
B
C
A
D
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Example Mixed Logic (Final)
Assume this design uses NAND gates only
B
C
A
D
6 NAND gates are used
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Mixed Logic

• How about build the prior circuits with only NOR
  gates?

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Example Mixed Logic (1)
B
C
A
D
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Example Mixed Logic (2)
B
C
A
D
Add vertical bar for each inversion
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Example Mixed Logic (3)
Assume this design uses NOR gates only
B
C
A
D
Convert each gate to a NOR
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Example Mixed Logic (4)
Assume this design uses NOR gates only
B
C
A
D
Balance number of Bubbles on each wire
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Example Mixed Logic (4)
Assume this design uses NOR gates only
B
C
A
D
Balance number of bubbles on each wire and
substitute all gates to NOR
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Example Mixed Logic (Final)
Assume this design uses NOR gates only
B
C
A
D
7 NOR gates are used
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Mixed Logic Example II (1)
C
D
B
A
Implement the logic circuits by ignoring all
inversions
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Mixed Logic Example II (2)
C
D
B
A
Add vertical bar/bubble for each inversion
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Mixed Logic Example II (3)
C
D
B
A
Assume this design uses NAND gates only
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Mixed Logic Example II (4)
C
D
B
A
Balance the bubbles for each wire w/ inverters
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Mixed Logic Example II (5)
C
D
B
A
Remove the vertical bars/bubbles
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Mixed Logic Example II (6)
C
D
B
A
Replace all the gates to NAND gates
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Mixed Logic Example II (7)
C
D
B
A
Final mixed logic uses 11 NAND gates (one of
them is a triple-input NAND gate)
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Mixed Logic Example III (1)
B
D
A
C
Implement the logic circuits by ignoring all
inversions
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Mixed Logic Example III (2)
B
D
A
C
Add vertical bar/bubble for each inversion
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Mixed Logic Example III (3)
B
D
A
C
Assume this design uses NOR gates only
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Mixed Logic Example III (4)
B
D
A
C
Balance the bubbles for each wire w/ inverters
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Mixed Logic Example III (5)
B
D
A
C
Remove the vertical bars/bubbles
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Mixed Logic Example III (6)
B
D
A
C
Replace all the gates to NOR gates
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Mixed Logic Example III (7)
B
D
A
C
Final mixed logic uses 9 NOR gates