MILAN

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MILAN
PACC PI Meeting Palm Springs, California
June 23, 2003 Akos Ledeczi akos_at_isis.vanderbilt.e
du
http//www.isis.vanderbilt.edu/projects/milan/
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Project Data

• Personnel
• USC
• Viktor K Prasanna, PI
• C S Raghavendra, Co-PI
• A Bakshi, V Mathur, S Mohanty, Y Yu, students
• Vanderbilt
• Akos Ledeczi, PI
• J Davis, Z Molnar, E Magyari, S Neema,
  researchers
• A Agrawal, H Bowen, B Eames, J Farkas, K
  Nagarajan, students
• Dates
• start 02-2001
• Expected end 06-2004

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MILAN Status
GME 3
Design Space Exploration Tools
Functional Simulators
High-level Power Estimators
Cycle-Accurate Power Simulators
System Generation and Synthesis Tools
Target System
Model interpreter feeding-back results
Model interpreter driving simulators/tools
i
i
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Release Status

• MILAN v0.9 Beta
• March 2003
• Has everything shown in previous slide (except
  for Mambo)
• Documentation (Users Manual, Tutorials)
• Number of downloads so far 50
• MILAN v0.95 Beta
• June 2003
• Mambo
• PowerPC support
• Linux runtime support
• MPI runtime support
• MILAN v1.0
• September 2003
• Extensibility toolkit (beta version)
• Other items based on user feedback

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Target Platform Support

• Identified need based on community response
  PowerPC and Linux
• In addition Space Application Group Need MPI
• Ported dataflow kernel to PowerPC, Linux and MPI
• (and integrated Mambo, a PowerPC simulator used
  by the Space Application Group)

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BAE Event Extraction App

• Demo application selected to highlight new
  capabilities
• Able to run uniprocessor version of app on Mambo
• Able to run multiprocessor version of app
  natively on multiple PowerPCs using Linux and MPI
• Will be demonstrated at poster session

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PARIS and PASTA use of MILAN

• Selection of energy-efficient architecture for
  PARIS application
• duty-cycle and multi-rate application modeling,
  design space exploration based on duty-cycle
  parameters
• energy-efficient kernel design using
  reconfigurable devices (MILAN-R)
• evaluation of PXA 250, PowerPC, TI DSP, ProASIC,
  and Virtex-II Pro
• initial conclusion low power FPGA floating pt.
  processor is the best choice
• Modeling, performance estimation, and
  energy-efficient ATR application design for using
  PASTA stack
• modeling of PASTA stack and its power-aware
  features
• high-level estimation and profiling for PASTA
  stack
• identification of energy-efficient mapping and
  scheduling using MILAN design space exploration
  (DESERT)
• initial conclusion up to 2x energy saving
  through efficient mapping and scheduling of
  beam-forming using PASTA stack

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Planned XTK Capabilities

• Interpreter framework generation
• Custom API synthesized to aid interpreter writers
• Based on automatically extending the updated GME
  3 Builder Object Network
• Intermediate libraries
• Generic portions of interpreters can be reused
• Existing interpreters already make use of the
  current intermediate libraries for processing the
  application models
• Feedback interpreter generation
• Automatic creation of feedback interpreters from
  algorithm models
• Support tools for extending the MILAN modeling
  paradigm

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XTK Overview
MILAN Metamodel
Generates
is based on
Graph library
Graphbuilder library
utilizes
MILAN XTK libraries
. . .
Additional intermediate libraries
MILAN interpreter
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Feedback Interpreter Generation
The user models the simulators feedback algorithm
The feedback interpreter is automatically
generated and integrated into MILAN
Generated simulator specific feedback interpreter
The generated interpreter can be used to
integrate simulator results into the MILAN model
database
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Recent Vanderbilt Contributions

• Release preparation (Installshield)
• Setup and maintenance of download site (including
  open source repository milan.isis.vanderbilt.edu)
  
• Documentation (Users Manual and Tutorials)
• Mambo integration
• PowerPC support
• Runtime support of Linux and MPI
• BAE (Space app group) event extraction
  application integration
• Initial work on MILAN Extensibility Toolkit

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Recent USC Contributions1.Support for Duty-Cycle

• Modeling of duty-cycle parameters
• simulation over a period of time
• shut-down or transition to low-power states
• multi-rate execution
• multi-rate input (e.g. camera input)
• Tradeoff analysis for various duty-cycle
  parameters
• enhanced DSE support
• Application profiling
• single execution instance as well as over a
  duty-cycle
• latency and energy estimates, state transition
  details

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Recent USC Contributions 2.Enhanced Design
Space Exploration

• Graphical interface between DESERT and HiPerE
• Automatically invokesHiPerE and shows the
  results
• Allows sorting of designs based on performance
• Designs can be compared using bar graphs

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Recent USC Contributions 3.Support for
Optimization, 4.FPGA Modeling

• Given, a linear array of tasks, a set of
  alternatives for each task, cost incurred between
  execution of two tasks (reconfiguration,
  communication, voltage scaling, etc.)
• Minimize overall energy or latency
• Inspired by the PARIS project
• e.g FAST/MHT algorithm
• Model kernel designs using FPGAs
• Rapid energy, latency, area estimation
• Automatic feedback to MILAN models
• Allows choosing between available implementations
  of components
• Simulator integration in progress
• ModelSim, Xilinx XPower, Actel SmartPower
• MILAN-R CD includes a version of MILAN enhanced
  for the reconfigurable devices

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Recent Publications

• Ledeczi A., Davis J., Neema S., Agrawal A.
  Modeling Methodology for Integrated Simulation
  of Embedded Systems, ACM Transactions on
  Modeling and Computer Simulation, January 2003
• Y. Yu and V. K. Prasanna, Energy-Balanced Task
  Allocation for Collaborative Processing in
  Networked Embedded Systems, Language Compilers
  and Tools for Embedded Systems (LCTES), June
  2003.
• Seonil Choi and Viktor K. Prasanna, Time and
  Energy Efficient Matrix Factorization, Field
  Programmable Logic and Applications, September
  2003.
• S. Mohanty and V. K. Prasanna, An Algorithm
  Designers Workbench for Platform FPGAs, Field
  Programmable Logic and Applications, September
  2003.
• J. Ou, S. Choi, G. Govindu, and V. K. Prasanna,
  Creating Parameterized and Energy-Efficient
  System Generator Designs, accepted at Sixth
  Annual Military Application of Programmable Logic
  Devices (MAPLD), September 2003.
• E. Andreev, S. Mohanty, and V. K. Prasanna, A
  Modeling and Optimization Framework for Mapping
  of Linear Array of Tasks onto Adaptive Computing
  Systems, accepted at Sixth Annual Military
  Application of Programmable Logic Devices
  (MAPLD), September 2003.