Low Power Design: From Soup to Nuts Mary Jane Irwin and Vijay Narayanan Dept of CSE, Microsystems De

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Low Power Design From Soup to NutsMary Jane
Irwin and Vijay NarayananDept of CSE,
Microsystems Design LabPenn State University
(www.cse.psu.edu/mdl)
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Tutorial Outline
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Why worry about power?-- Heat Dissipation
DEC 21164
source arpa-esto
From Rabaey, 1995
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Why worry about power ?-- Battery Size/Weight
50
Rechargable Lithium
40
30
20
10
0
Expected battery lifetime increase over the next
5 years 30 to 40
From Rabaey, 1995
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Why Power Matters

• Packaging costs cooling costs
• Power supply rail design
• Digital noise immunity
• Battery life (in portable systems)
• Environmental concerns
• Office equipment accounted for 5 of total US
  commercial energy usage in 1993
• Energy Star compliant systems

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Technology Directions SIA Roadmap
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Chip Power Densities
W/cm2
Hot plate
Process (microns)
From Borkar, 1999
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Figures of Merit

• Power consumption in Watts
• determines battery life in hours
• sets packaging limits
• Peak power
• determines power ground wiring designs
• impacts signal noise margin and reliability
  analysis
• Energy efficiency in Joules
• rate at which energy is consumed over time
• energy power delay (joules watts
  seconds)
• lower energy number means less power to perform a
  computation at the same frequency

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Power versus Energy
Power is height of curve
Watts
Lower power design could simply be slower
time
Energy is area under curve
Watts
Total energy needed to complete operation
time
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Figures of Merit, cont

• Power-delay product (PDP) Pav tp
• PDP is the average energy consumed per switching
  event
• lower power design could simply be slower
• Energy-delay product (EDP) PDP tp
• takes into account that one can trade increased
  delay for lower energy/operation
• allows one to understand tradeoffs better
• higher supplies reduce delay, but increase energy

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Understanding Tradeoffs
Lower EDP
b
Energy
a
c
d
1/Delay
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EDP Plot
Energy-Delay
Energy-Delay (norm)
Energy
Delay
VDD (V)
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Notebook Power Usage Stats
1995 5V Notebook PC
From Roy, 1997
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Processor Power Budgets
Inner circle low end embedded microprocessor Next
circle high end CPU with on-chip cache Next
circle MPEG2 decoder ASIC Outer circle ATM
switch ASIC
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Key References

• Borkar, Design Challenges of Technology Scaling,
  IEEE Micro, Aug 1999.
• Chandrakasan, Broderson, Low Power Digital CMOS
  Design, KAP, 1995.
• Pedram, Power minimization in IC design, ACM
  TODAES, 1(1)3-56, 1996.
• Proceedings of ACM/IEEE Symposium on Low Power
  Electronics and Design (SLPED), 1995 - 1999.
• Rabaey, Digital Integrated Circuits,
  Prentice-Hall, 1996.
• Rabaey, Pedram, Low Power Design Methodologies,
  KAP, 1996.
• SIA Roadmap, notes.sematech.org/ntrs/PubINTRS.nsf
• Tiwari, Reducing power in high-performance
  microprocessors, DAC, 1998.
• Yeap, Practical Low Power Digital VLSI Design,
  KAP, 1998.