Addition and Subtraction with Signed-Magnitude Data (Mano, Section 10-2)

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Addition and Subtraction with Signed-Magnitude
Data (Mano, Section 10-2)

• Basics Seminar, CSc 8215 High Performance
  Computing (2005 Fall)
• Mary R. Hudachek-Buswell

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Sign-magnitude number

• A sign-magnitude number Z can be represented as
  (As, A) where As is the sign of Z and A is the
  magnitude of Z.
• The leftmost position, As, is the sign bit.
• The sign bit is either positive 0 or negative
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Number Signed-Magnitude
3 0 11
2 0 10
1 0 01
0 0 00
-0 1 00
-1 1 01
-2 1 10
-3 1 11
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Eight Conditions for Signed-Magnitude
Addition/Subtraction
Operation ADD Magnitudes SUBTRACT Magnitudes SUBTRACT Magnitudes SUBTRACT Magnitudes
Operation ADD Magnitudes A gt B A lt B A B
(A) (B) (A B)
(A) (-B) (A B ) - (B A ) (A B )
(-A) (B) - (A B ) (B A ) (A B )
(-A) (-B) - ( A B)
(A) - (B) (A B ) - (B A ) (A B )
(A) - (-B) (A B)
(-A) - (B) - ( A B)
(-A) - (-B) - (A B ) (B A ) (A B )
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Examples

• Example of adding two magnitudes when the result
  is the sign of both operands

• 3 0 011
• 2 0 010
• 5 0 101

• -3 1 011
• 2 0 010 -( 3 011
• - 2) 010
• - 1 1 001

Example of adding two magnitudes when the result
is the sign of the larger magnitude
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Flowchart of Addition and Subtraction with
Signed-Magnitude Data
Ar B A Ars Bs
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Summary of Addition and Subtraction with
Signed-Magnitude Data

• The signs use an exclusive OR gate where if the
  output is 0, then the signs are the same.
• Hence, add the magnitudes of the same signed
  numbers. If the sum is an overflow, then a carry
  is stored in E where E 1 and transferred to the
  flip-flop AVF, add-overflow.
• Otherwise, the signs are opposite and subtraction
  is initiated and stored in A.
• No overflow can occur with subtraction so the AVF
  is cleared.
• If E 1, then A gt B.
• However, if A 0, then A B and the sign is
  made positive.
• If E 0, then A lt B and sign for A is
  complemented.

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Addition and Subtraction with Signed-Magnitude
Data Hardware Design
B register
Bs
Mode Control
Complementer
AVF
M
Parallel Adder
E
Input Carry
Output Carry
S
A register
As
Load Sum