FFT VLSI Implementation

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FFT VLSI Implementation

• ???????
• ???
• VLSI Signal Processing

• Shousheng He and Mats Torkelson, A new approach
  to pipeline FFT processor. IEEE Proc. Of IPPS,
  P766-770, 1996.
• E. Bidet, D. Castelain, C. Joanblanq, and P.
  Senn, A fast single-chip implementation of 8192
  complex point FFT. IEEE J. Solid-State Circuits,
  P300-305, March 1995

Updated on 4/2/2001
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FFT Review
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Implementation --- Two Extreme Method

• Slow ? ----------------- Speed -----------------
  ?Fast

Small ? ------------------Area-------------------
?Large
Complicated ? ------------ Control
--------------- ?Simple
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Design Consideration

• System Requirement
• e.g., speed, area,power
• Trade-off in these two cases, we need
• More Processing Elements (PEs)
• Better Processing Element Utilization Rate
• Better Control Scheme

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FFT Processor --- Block Diagram
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Some Current Themes
Radix-2 Single-path Delay Feedback. ( N 16 )
Radix-2 Multi-path Delay Commutator. ( N 16 )
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Some Current Themes (cont.)
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Comparison
Radix / Speed Low ? ------------------------------
----- ?High

• Control Theme
• Simple ? -----------------------------------
  ?Complex

Processing Ability / Unit Low ?
----------------------------------- ?High
Combine the advantages ? Further decompose high
radix PE
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Decompose Method (1)

• Simply reuse the repeated micro unit

A radix-4 PE
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Decompose Method (2)

• From algorithm level

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Graphical Explanation (N16)
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Graphical Explanation (cont.)

• The Eqs are equivalent to the operations below

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Circuit of BF2I and BF2II
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Radix-22 Single-path Delay Feedback
FFT architecture using the above technique, for
N256
Compare with original architecture
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Conclusions

1. FFT Applications Radar Signal Processing, Fast
   convolution, Spectrum Estimation, OFDM-based
   Modulation/demodulations
2. Efficient VLSI architectures (parallel
   processing) are required for real-time
   processing.
3. However, most systems still employ DSP processors
   (e.g., TI C3x/C5x) for computations (fast
   algorithms like DIT and DIF FFT).
4. VLIW (Very Long-length Instruction Word)-based
   processors (TI C6x) need new programming skills
   to utilize the two parallel MAC units.