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ECE 456 Computer Architecture

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ECE 456 Computer Architecture Lecture #2 - Architecture & Organization Instructor: Dr. Honggang Wang – PowerPoint PPT presentation

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Title: ECE 456 Computer Architecture


1
ECE 456 Computer Architecture
  • Lecture 2 - Architecture Organization
  • Instructor Dr. Honggang Wang

2
Administrative Issues (9/18/13)
  • Project team set-up due Wednesday, Sept. 25
  • If you missed the first class, go to the course
    website for syllabus and 1st lecture.
  • My office hours
  • M./W. 11 am -12pm, Fri. 1200 -200 pm

www.faculty.umassd.edu/honggang.wang/teaching.html
3
Agenda
  • Review Lecture 1
  • Lecture 2

4
Review of Lecture 1
  • In the first lecture, we covered the
  • Course syllabus operational details
  • Introduction to computer systems
  • History of computers (a number of Firsts...)
  • Evolution of Intel family
  • The evolution of computers has been characterized
    by increasing processor speed/memory capacity/I/O
    capacity speed and decreasing component size
  • Performance balancing is a critical issue in
    computer system design

5
The First
  • The first general-purpose electronic digital
    computer
  • The first computer to use the Stored Program
    concept
  • The first computer bug
  • The first transistor
  • The first chip (integrated circuit)
  • The first minicomputer
  • The first microprocessor

6
The first general-purpose electronic digital
computer
  • ENIAC (Electronic Numerical Integrator And
    Computer)
  • designed by Mauchly Eckert at the U.
    Pennsylvania
  • started 1943, finished 1946
  • disassembled 1955
  • 18,000 vacuum tubes
  • 30 tons
  • 30 feet 50 feet
  • 140 kw power consumption

7
The first computer to use the Stored Program
concept
  • IAS computer named for the Institute for
    Advanced Study at Princeton University
  • Began 1946, completed 1952
  • The prototype of all subsequent
  • general-purpose computers
  • Structure
  • Von Neumann machines

8
The first computer bug
  • Grace Hopper found a moth stuck in a relay
    responsible for a malfunction
  • An error in a computer program that prevents it
    from working correctly or produces an incorrect
    result

http//www.jamesshuggins.com/h/tek1/first_computer
_bug.htm
9
The first transistor
  • Invented at Bell labs in 1947
  • Won a Nobel prize
  • Uses Silicon
  • Advantages

http//www.cedmagic.com/history/transistor-1947.ht
ml William Shockley (seated at Brattain's
laboratory bench), John Bardeen (left) and Walter
Brattain (right)
http//en.wikipedia.org/wiki/Transistor
10
The first chip
  • Invented by Jack Kilby at Texas Instruments in
    1958
  • Integrated Circuits are transistors, resistors,
    and capacitors integrated together into a single
    chip
  • Won a Nobel prize

11
The first minicomputer - 1964
  • DEC PDP-8
  • Small enough to sit on a lab bench
  • Embedded applications
  • Flexible bus structure

...
Console controller
CPU
Main memory
I/O module
I/O module
Omnibus
12
The first microprocessor 1971
  • The Intel 4004 had 2,250 transistors
  • four-bit
  • 108Khz
  • Called Microchip

The Pioneer 10 spacecraft used the 4004
microprocessor. It was launched on March 2, 1972
and was the first spacecraft and microprocessor
to enter the Asteroid Belt.
13
Lecture 2 Topics
  • Concept of computer architecture computer
    organization
  • Contemporary computer architecture is
  • von Neumann architecture, plus
  • Interrupts

14
What is Computer Architecture?
  • Term coined by IBM System/360 group in 1964
  • The structure of a computer that a machine
    language programmer must understand to write a
    correct program for a machine
  • cited from Advanced Computer Architecture A
    Design Space Approach, by D. Sima et al,
    Addison-Wesley 1997
  • attributes visible to a programmer registers,
    instruction set, instruction formats, addressing
    modes, etc
  • example Is there a multiply instruction?

15
What is Computer Organization?
  • The operational units and their
    interconnections that realize the architectural
    specifications
  • about how features are implemented
  • hardware details transparent to programmers
    control signals, interfaces, memory technology
  • example Will the multiply instruction be
    implemented by a hardware multiply unit or
    repeated addition?

16
Architecture Organization
  • A particular architecture can span many years and
    encompass a number of different computer models
    (organizations)
  • all Intel x86 family share the same basic
    architecture
  • IBM System/370 family share the same basic
    architecture
  • organization, thus price and performance differ
    between different models
  • this gives code compatibility

17
Agenda
  • Concept of computer architecture computer
    organization
  • Contemporary computer architecture is
  • von Neumann architecture, plus
  • Interrupts

18
Von Neumann Architecture
  • General structure of von Neumann machines (the
    IAS computer)

19
The IAS Computer(prototype of modern computers)
Chapter 2.1
20
Memory of IAS
  • Memory 1000 words /storage locations
  • 40 binary bits per word
  • both data and instructions can be stored
  • memory format for a number
  • memory format for instructions

0
1
39
Sign bit
0
39
8
20
28
Opcode Address
Opcode Address
Right instruction
Left instruction
21
Instruction Set of IAS
  • 21 instructions
  • data transfer between memory and registers or
    between two registers
  • unconditional branch
  • conditional branch
  • arithmetic
  • address modify

22
Table 2.1The IAS Instruction Set
23
IAS Registers
  • Memory Buffer Register (MBR) contains a word to
    be stored in memory or sent to I/O, or is used to
    receive a word from memory or I/O
  • Accumulator (AC) Multiplier Quotient (MQ)
    employed to hold temporarily operands and results
    of ALU operations.
  • Memory Address Register (MAR) specifies the
    memory address for the word to be written from or
    read into MBR.
  • Instruction Register (IR) contains the 8-bit
    opcode of the instruction being executed
  • Instruction Buffer Register (IBR) employed to
    hold temporarily the right-hand instruction from
    a word in memory
  • Program Counter (PC) contains the address of the
    next instruction-pair to be fetched from memory

24
Operation of IAS
  • Instruction cycle
  • Fetch
  • Opcode ? IR
  • Address ? MAR
  • Execute

25
Von Neumann Architecture Key Characteristics
  • Memory with addressable locations
  • Data and instructions are stored in a single
    read-write memory
  • Basic sequential execution (unless explicitly
    modified)

26
Administrative Issues (9/23/13, Monday.)
  • Project Team
  • due Wednesday, Sep 25
  • Homework 1
  • Assigned today, please go to the course website
    to download problems
  • Todays topic
  • Finish Lecture 2 (Interrupt)

27
Agenda
  • Concept of computer architecture computer
    organization
  • Contemporary computer architecture is
  • von Neumann architecture, plus
  • interrupts

28
Interrupts
  • All contemporary computers provide a mechanism by
    which other modules may interrupt the normal
    processing of the processor
  • Contemporary computer architecture
  • von Neumann architecture interrupts

Chapter 3.2
29
Common Classes of Interrupts
  • Program interrupt
  • division by zero, using undefined instructions,
    memory protection violations, arithmetic overflow
  • Timer interrupt
  • generated by an internal processor timer
  • I/O interrupt
  • Programmer-requested interrupt
  • Hardware failure
  • power failure, hardware malfunctions

30
Why Interrupts? (1)
  • Program flow of control without
  • interrupts
  • Code segments
  • 1,2,3 do not involve I/O
  • 4 prepare for actual I/O operation
  • Actual I/O command
  • 5 complete I/O operation

31
Why Interrupts? (2)
Why Interrupts? (2) -- Program Control flow
Timing No Interrupts
  • I/O devices are much slower than processor -- a
    very wasteful use of processor
  • At the point of each WRITE call, processor must
    pause and remain idle

32
Why Interrupts? (3)
  • With interrupts, the processor can be engaged in
    executing other instructions while an I/O
    operation is in progress
  • improved processing efficiency
  • concurrency

33
Illustration Short I/O Wait
  • Time required for the I/O operation is less than
    the time to complete the execution of
    instructions between write calls in the user
    program.

34
Why Interrupts? (4)
Why Interrupts? (4) -- Program Control Flow
Timing with Interrupts Short I/O Wait
concurrency
gain in efficiency
35
Illustration Long I/O Wait
  • Time required for the I/O operation is more than
    the time to complete the execution of
    instructions between write calls in the user
    program.

36
Why Interrupts? (5) -- Program Control Flow
Timing with Interrupts Long I/O Wait
concurrency
gain in efficiency
37
Summary
  • With the use of interrupts, concurrent execution
    of user program and I/O operation is made
    possible!
  • Improved CPU processing efficiency!

38
Transfer of Control via Interrupts
Execution suspended with context saving
Execution resumed with context recovery
39
Multiple Interrupts
  • Various interrupt sources multiple
    interrupts
  • How to deal with multiple interrupts?

40
How to deal with multiple interrupts?
  • Can an interrupt be interrupted while it is being
    processed?
  • NO sequential interrupt processing
  • YES which interrupt should the CPU service?
  • priorities and nested interrupt
    processing

41
Sequential Interrupt Processing (1)
  • Disable interrupt (DI) while processing an
    interrupt, enable interrupt (EI) before resuming
    the use program

DI
EI
EI
42
Sequential Interrupt Processing (2)
  • Advantages
  • simple all interrupts are handled in strict
    sequential order
  • Disadvantages
  • without considering relative priority or
    time-critical needs

43
Nested Interrupt Processing (1)
44
Nested Interrupt Processing (2) Example
  • A system has three I/O devices
  • a printer with priority 2
  • a disk with priority 4
  • a communication line with priority 5
  • Multiple interrupts (each takes 10 time units)

Increasing priority
time
0
25
15
10
20
communication line interrupt
printer interrupt
disk interrupt
45
Time Sequence of Example Multiple Interrupts
time
0
25
15
10
20
disk Interrupt (4)
printer Interrupt (2)
comm. line Interrupt (5)
2
1
3
4
6
5
46
Nested Interrupt Processing (4)
  • Advantages
  • taking into account relative priority or
    time-critical needs
  • Disadvantages
  • complex defining priorities, saving information

47
Summary of Lecture 2
  • Basic concept of computer architecture and
    organization
  • Von Neumann architecture (3 key concepts)
  • Interrupts and multiple interrupts
  • Contemporary computer architecture is von Neumann
    architecture, plus interrupts

48
Things To Do
Next Topics
  • Computer function structure
  • Find your partners for the class project
  • email me the team information
  • Check out the class website about
  • lecture notes
  • reading assignments
  • the project
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