SET Fault Tolerant Combinational Circuits Based on Majority Logic

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SET Fault Tolerant Combinational Circuits Based
on Majority Logic

• Álisson Michels Lorenzo Petroli
• Carlos Lisbôa
• Fernanda Kastendsmidt Luigi Carro

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What is Wrong with TMR ?

• TMR does not protect against two faults affecting
  different modules

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Fault-tolerant analog voter
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Use of majority gates in AOI logic
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Sample implementation full adder
Classic TMR implementation - 3 standard AOI full
adder modules - 1 digital voter per output bit
Proposed solution - single full adder
module - majority gates used to implement AND/OR
functions - analog comparators used to implement
majority gates and inverters
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Area Comparison(32 nm technology)
The proposed solution brings a 36 reduction in
area, when compared to the classic TMR
implementation
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Thank You !

• For more details,
• come and see the poster !
• Contact calisboa_at_inf.ufrgs.br