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Arithmetic Logical Unit

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Title: Arithmetic Logical Unit


1
Arithmetic Logical Unit
Be able to explain the organization of the
classical von Neumann machine and its major
functional components Focus on ALU design issues
2
Arithmetic
  • Where we've been
  • Performance (seconds, cycles, instructions)
  • Abstractions Instruction Set Architecture
    Assembly Language and Machine Language
  • What's up ahead
  • Implementing the Architecture
  • Focus on ALU

3
Numbers
  • Many interpretations for bit strings
  • Numbers
  • Binary numbers (base 2)0000 0001 0010 0011 0100
    0101 0110 0111 1000 1001...
  • Octal and Hexadecimal representation
  • Decimal 0...2n-1
  • Factors to consider
  • numbers are finite (overflow)
  • fractions and real numbers
  • negative numbers
  • How do we represent negative numbers?

4
Representations for Negative Numbers
  • Sign Magnitude One's Complement
    Two's Complement000 0 000 0 000
    0001 1 001 1 001 1010 2 010
    2 010 2011 3 011 3 011 3100
    -0 100 -3 100 -4101 -1 101 -2
    101 -3110 -2 110 -1 110 -2111
    -3 111 -0 111 -1
  • Which would you use?
  • Rotation measurement (shaft encoder) which
    would you use?
  • What is the highest negative number that can be
    represented by an 8 bit number?

5
Addition Subtraction
  • Just like in grade school (carry/borrow 1s)
    0111 0111
  •  0110 - 0110
  • 1101 0001
  • Two's complement operations easy
  • subtraction using addition of negative numbers
    0111  1010
  • 0001
  • Overflow (result too large for finite computer
    word)
  • e.g., adding two n-bit positive numbers yields
    negative number 0111  0001 note that
    overflow is somewhat misleading, 1000 it
    does not mean a carry overflowed

6
Overflow - Exception
  • An exception (interrupt) occurs
  • Control jumps to predefined address for exception
    processing
  • Interrupted address is saved for possible
    resumption
  • Details based on software system / language
  • example flight control vs. homework assignment

7
Review The Multiplexor
  • Selects one of the inputs to be the output,
    based on a control input
  • Lets build our ALU using a MUX

note we call this a 2-input mux even
though it has 3 inputs!
0
1
8
Building a 32 bit ALU
Ó Morgan Kaufmann Publishers
9
What about subtraction (a b) ?
  • Two's complement approach just negate b and
    add.
  • How do we negate?

Ó Morgan Kaufmann Publishers
10
Multiplication
  • More complicated than addition
  • accomplished via addition and shifting
  • How many bits in the result?
  • More time
  • More storage
  • Let's look at 3 versions based on grade school
    algorithm 0010 (multiplicand) __x_101
    1 (multiplier)
  • Negative numbers convert and multiply
  • there are better techniques, we wont look at them

11
Multiplication Implementation
Ó Morgan Kaufmann Publishers
12
Multiplication Hardware second version
Initially 0
13
Final Version
One partial-product addition per cycle. OK if
multiplication is not frequent.
Ó Morgan Kaufmann Publishers
14
Neat Multiplication Trick
  • Simple example 1221 9
  • 1221 9 10989
  • 1221 (10 1)
  • 122110 12211
  • 12210 1221 10989
  • More complex 1221 99
  • 1221 100 1221 1
  • 122100 1221
  • 122100 1221 120879
  • Can we apply this to binary numbers?

15
Neat Multiplication Trick Binary Numbers
  • 1010 011 10 3 30
  • 1010 (100 001)
  • 1010 100 1010 001
  • 101000 1010
  • (32 8) (8 2)
  • 30
  • 1010 01110 10 14 140
  • 1010 (10000 00010)
  • 10100000 101000010
  • 10100000 10100
  • (128 32) ( 16 4) 160 20
  • 140
  • Identify runs of 1, and convert the multiply
    problem into a shifting problem subtraction.

16
Booths Algorithm
  • 0 1 1 1 1 0
  • End of run (current bit 0, bit to right 1)
  • Middle of run
  • Beginning of run
    (current bit 1, bit to right 0)
  • Booths Algorithm
  • 00 Middle of string of 0s, so no operation
  • 01 End of string of 1s, so add multiplicand to
    the left half of the partial product
  • 10 Beginning of the 1s run, so subtract the
    multiplicand from the left half of the partial
    product
  • 11 Middle of the 1s run, so no operation
  • What happens if the runs are short 01001010101 ?

17
Floating Point (a brief look)
  • We need a way to represent
  • numbers with fractions, e.g., 3.14163.1416 100
    (Do you recognize this?)
  • very small numbers, e.g., .0000000011.0 10-9
  • very large numbers, e.g., 3.15576 109
  • Scientific notation one non-zero digit to left
    of decimal point
  • Binary equivalent one non-zero digit to left of
    binary point (1.0 2-1)
  • Representation
  • sign, exponent, fraction (1)sign fraction
    2exponent
  • leading bit is always 1, so this is implied. For
    example in 1.011 is stored 011.
  • significand 1 fraction gt significand 1 bit
    longer than fraction stored
  • more bits for fraction (significand) gives more
    accuracy
  • more bits for exponent increases range
  • IEEE 754 floating point standard
  • single precision 1 bit sign, 8 bit exponent, 23
    bit fraction 32 bits
  • what if exponent is negative?
  • bias the exponent by 127, so -1 is represented by
    -1127126
  • double precision 1 bit sign, 11 bit exponent,
    52 bit fraction 64 bits

18
Floating point addition
  • Floating point arithmetic deserves special
    attention
  • A simple floating point addition problem
  • 99.99 0.1610 9.999 101 1.610 10-1
    (scientific notation)
  • assume 4 digit significand
  • To add we need the exponents to be the same
  • Align the decimal point
  • 9.999 101 0.01610 101
  • Add the significands
  • Sum is 10.015 101
  • Normalize to scientific notation
  • 10.015 101 1.0015 102
  • We started with 4 digit significand. Reduce to 4
    digit significand.
  • result is 1.002 102

19
Pipelines for Vector Addition
  • Illustrate the potential advantages of pipelines
  • Pipelines for instruction execution discussed in
    Chapter 6
  • Objective Compute C A B, where A and B are
    7 x 1 vectors
  • i.e. C(i) A(i) B(i)
  • Each subtraction involves
  • Complement of B(i)
  • Increment to get twos
  • complement
  • Add to A(i)
  • Use pipeline for overlapping operations
  • Registers act as buffers storing intermediate
    values

20
B(i) A(i)
Clock Pulse R1 R2 R3 R4 R5
1 B(1)
2 B(2) B(1)
3 B(3) B(2) B(1)1 A(1)
4 B(4) B(3) B(2)1 A(2) C(1)
5 B(5) B(4) B(3)1 A(3) C(2)
6 B(6) B(5) B(4)1 A(4) C(3)
7 B(7) B(6) B(5)1 A(5) C(4)
8 B(7) B(6)1 A(6) C(5)
9 B(7)1 A(7) C(6)
10 C(7)
What if A, B are 8 element? Advantage of
pipeline? Basic assumptions / requirements of
good pipelines?
21
Binary to Floating Point
  • Hexadecimal number 24A60000
  • Bit pattern
  • 0010 0100 1010 0110 0000 0000 0000 0000
  • 0 01001001 0100 1100 0000 0000 0000 000
  • 73 4x16-1 12x16-20x16-3 0x16-4
    0x16-5 0x16-6
  • Exponent Sign 73 -127 -54
  • Mantissa 1.25 .046875 1.29688
  • 1.29688 x 2-54

8/29/2016
22
Chapter 3 Assignments
  • 3.3.1, 3.3.2, 3.3.3, 3.5.1, 3.10.1, 3.10.2,
    3.10.3, 3.11.2
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