Characterization and Modelling

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James Rathmell Anthony Parker
Electrical Engineering
Electronics The
University of Sydney
Macquarie University
EuMIC04-3

• Characterization and Modelling
• of
• Substrate Trapping
• in HEMTs

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Outline

• Introduction
• Observation of gate lag, etc.
• SRH trap theory
• SRH trap modelling
• Conclusion

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Motivation

• Interested in large-signal, broad-band
  modelling that reflects small-signal performance
• Low-frequency memory effects are important
  for high-frequency modelling
• Interested in models that have continuous derivat
  ives and are convergent

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Pros Cons

• Able to represent heating, trapping,
  impact ionization and breakdown
• Able to model non-linearity by feedback
  networks representing the various effects
• Difficulties with the large solution-space
  of parameters

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Outline

• Introduction
• Observation of gate lag, etc.
• SRH trap theory
• SRH trap modelling
• Conclusion

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Step Response
Drain Potential (vDS)
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(No Transcript)
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Transient behaviour
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Outline

• Introduction
• Observation of gate lag, etc.
• SRH trap theory
• SRH trap modelling
• Conclusion

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SRH trap theory

• Emission and capture currents give integrated
  trap voltage
• Trap voltage nT added to gate potential
• Input nI linear function of terminal potentials
• Impact ionization additional current injection

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SRH equations
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Gate lag
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Gate lag
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GaN Bias-evolution
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Outline

• Introduction
• Observation of gate lag, etc.
• SRH trap theory
• SRH trap modelling
• Conclusion

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Dispersion Signal Flow
vDS

iDS

vGS

vDS
Self Heating
Memoryless Nonlinearity
HT(w)
Power
Positive Traps
Hh(w)
Impact Ionization
Negative Traps
vGS
He(w)
Electron Trapping
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Bandwidth (fb-fa) / bias DependenceThird-order
Intermodulation
pHEMT (500MHz) VDS 3 V Vi -15 dBm IDSS 140
mA VTO -1.4 V
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Measuring H(w)
n 0.35 (7 dB/dec)
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SPICE Modelling
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Aplac Modelling
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Modelling 2
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Modelling 3
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Conclusion

• Modelling trapping by a restatement of
  SRH theory
• A powerful representation of heating,
  trapping, impact ionization and breakdown
• Allows exploration of effects of trapping
  on intermodulation

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Questions?
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Modelling
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SRH charging speed
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Temperature dependence of w
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Gate lag
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Transistor Characteristics