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Improving Energy Efficiency by Making DRAM Less Randomly Accessed

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Title: Improving Energy Efficiency by Making DRAM Less Randomly Accessed


1
Improving Energy Efficiency by Making DRAM Less
Randomly Accessed
  • Hai Huang, Kang G. Shin, Charles Lefurgy, Tom
    Keller
  • University of Michigan
  • IBM Austin Research Lab

2
Overview
  • Continual increase in the power budget allocated
    to main memory (i.e., DRAM)
  • E.g., in a mid-range IBM eServer system, 40 of
    the total system energy is consumed by its main
    memory subsystem
  • By passively monitoring memory traffic and
    managing the power, existing power management
    techniques are not fully exploiting deeper
    power-saving states
  • gt Actively shape memory traffic to enable
    existing techniques to save more energy

3
Passive Monitoring Memory Traffic
  • Why is passively monitoring memory traffic
    inefficient?
  • Memory accesses are random good for
    performance, bad for energy consumption!
  • Idle time between consecutive memory accesses is
    often too short for use of the deeper
    power-saving state
  • Randomness is mostly due to OSs arbitrary
    virtual-to-physical mapping

4
Example Active vs. Passive
5
How to Shape Memory Traffic
  • Essentially, we need to artificially create
    disparity in access frequency among different
    memory ranks
  • Hot Ranks and Cold Ranks
  • Disparity in access frequency can be created by
    finding and migrating frequently-accessed pages
    to a subset of memory ranks
  • Hot ranks contain frequently-accessed pages
  • Cold ranks contain infrequently-accessed and
    unmapped pages
  • Page migration can be done by system software

6
Implementation
Rank 0
Hot ranks
MC
page counter
Rank 1
Rank 2
Cold ranks
Rank 3
7
Issues with Page Migration
  • There is a cost associated with each page
    migration

Memory access frequency Is often highly
skewed!!! 6 pages causes 75 accesses 14 pages
causes 90 accesses Not all pages need to be
migrated
8
Evaluation
  • Simulators
  • Mambo IBM A full-machine simulator,
    cycle-accurate, supports PowerPC architecture
  • Memsim IBM Detailed trace-driven main memory
    simulator, written in CSIM
  • Workloads
  • Low memory-intensive workload SPECjbb bzip
    crafty
  • High memory-intensive workload SPECjbb art
    mcf
  • SPECjbb simulating 8 warehouses
  • SPEC2000 benchmarks using Reference input set

9
Low Memory-Intensive Workload
10
High Memory-Intensive Workload
11
Summary of Results
  • Energy
  • Actively shaping memory traffic saves 35 more
    energy than passively monitoring
  • Performance
  • Low memory-intensive workload small impact on
    performance
  • High memory-intensive workload significantly
    degrades performance due to more contention on
    hot ranks
  • Cost
  • Use hardware counters, or
  • Software page faults

12
Conclusion
  • Actively shaping memory traffic allows existing
    power management techniques to more effectively
    save power
  • Highly-skewed page accesses are observed
  • Alternative main memory design
  • Use high-performance/highly-parallel ranks as hot
    ranks
  • Use low-performance/low-power ranks as cold ranks
  • Allows frequently-accessed pages to be accessed
    faster
  • Allows memory ranks that hold infrequently-accesse
    d and unmapped pages to consume less energy
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