Combinational Logic IV FloatingPoint Arithmetic

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Combinational Logic IVFloating-Point Arithmetic

• Instructor Koling Chang
• email kchang_at_cs.ucdavis.edu

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Outline

• Fractions
• Floating-Point Representation
• Addition
• Multiplication

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Fractions

• Also called Real Number
• Representing fractions in the decimal system
• 0.7913
• in decimal
• 7x10-1 9x10-2 1x10-3 3x10-4
• Decimal point is used to identify the fraction
  part.
• This can be generalized.

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Binary Fraction

• 0.11001B
• 1.2-1 1.2-2 0.2-3 0.2-4 1.2-5 0.78125 D
• How do we convert between Binary Fractions to
  Decimal Fractions ?

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Converting Fraction from Binary to Decimal

• decimal_value 0.0
• for ( i n downto 1 )
• decimal_value (decimal_valuedi)/2

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Converting Fraction from Decimal to Binary

• For ( i 0 to n )
• decimal_value 2
• if ( decimal_value gt1 )
• bi 1
• decimal_value - 1
• else
• bi 0

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Example
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Representing Floating-Point Numbers

• Naive way- I bits for integer, F bits for
  fraction
• ?????.?????
• I F
• This is the Fixed-Point we talked about.
• Limited binary combinations result in a fixed
  range of real numbers that can be represented.
• Solution Make the point position floating

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Tradeoff Between I and F

• Textbook says Range and Precision Tradeoff
• Not quite correct What if there is no integer
  part.
• Precision is determined by the number of bits.
• Range is determined by the position of the point.

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Using Scientific Notation

• Writing Decimal number using scientific notation
  with significand and exponent
• 1.2345 x 1045
• 9.876543 x 10-37
• Same form can be applied to binary point numbers

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Binary Notation with Significand and Exponent

• 1101.101 x 211001 13.625 x 225
• 4.57179 x 108
• The Normal Form
• 1.X1X2X3 XM X 2
• 1.101101E11100

Yn-1Yn-2Yn-3 Y0
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Floating Point Representation

• Using two signed numbers to represent exponent
  and mantissa

1 bit
1 bit
N bits
M bits
Se
Exponent
Sm
Mantissa
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IEEE Standard

• Using excess-M for Exponent
• Save the leading bit 1 for mantissa with
  special format for 0.0
• IEEE754 double precision

1 bit
11 bit
52 bits
Sm
Exponent
Mantissa
excess-M (1023)
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IEEE Standard

• Single Presicion

1 bit
8 bit
23 bits
Sm
Exponent
Mantissa
excess-M (127)
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Special Values
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Limits

• Denormals
• Smallest normalized 1x2-126
• Largest denormal 0.1111111x2-127
• Smallest denormal 0.00000001x2-127
• 10-45
• NaNs -1 , 0/0

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Floating-Point Addition

• Match Exponents
• Shift smaller mantissa right to match exponents
• Add the Two Mantissas
• Normalize the Result
• Test for Overflow/Underflow

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Example

• 13.25 4.75
• 13.25 1.10101 x 23
• 4.75 1.0011 x 22
• (1.10101 0.10011) x 23
• 10.01 x 23 1.001 x 24

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Floating-Point Multiplication

• Add the two exponents
• Multiply the two mantissas
• Compute the result sign bit using XOR
• Normalize the final product
• Check for overflow/underflow

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Example

• 1.101x23 x 1.01x22
• 1.101 x 1.01 10.00001
• 23 x 22 25
• Answer 10.00001x25 1.000001x26

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Example

• Floating Point Adder (IBM 360)

Input bus
E1
E2
M1
M2
Adder 1
Shifter 1
E1-E2
Adder 2
R
zero digit checker
Adder 3
Shifter 2
leading zeros
M3
E3
output bus
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Co-Processor

• In old days, floating point were often handled by
  a co-processor.

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Combinational Logic Summary

• Common used combinational circuits
• mux, demux, encoder, decoder, comparator
• Arithmetic circuits
• Fixed-point representation
• Adder,
• Multiplier, Divider
• Floating-point representation, adder, multiplier