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Gigabit Ethernet PMD

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Continued reduction of potentiometer resistance resulted in a blown Emcore VCSEL ... Unable to obtain an open eye diagram by tuning the potentiometer ... – PowerPoint PPT presentation

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Title: Gigabit Ethernet PMD


1
Gigabit Ethernet PMD
  • Opto-Link, Inc. Status Report 9
  • Vinh Nguyen
  • April 14, 2005

2
Gigabit EthernetProgress Summary
  • Completed Tasks
  • Finished troubleshooting
  • Updated Bill of Materials
  • Updated budget to reflect latest purchases
  • Next Weeks Tasks
  • Complete second board layout
  • Design review for next fabrication
  • Place order for board fabrication
  • Assemble second board

3
Gantt Chart
4
Current Budget
5
Projected Budget
6
Estimated Bill of Materials
7
Transmitter Testing
  • Last weeks transmitter problems persisted
  • Testing resulted in closed eyes for both the
    AOC and the Emcore board designs
  • The VCSEL is lasing but no signal is getting
    though to the receiver
  • Probing the board resulted in a blown inductor

Transmitter PRBS7 Signal with no attenuation
8
Troubleshooting
  • Hypothesis Limiting resistor values may be
    incorrect
  • Would prevent the VCSEL from receiving enough
    current to bias it above threshold
  • Adjusting the potentiometers would have little
    effect on the output signal beyond a certain
    level

9
Testing the Hypothesis
  • Set bias potentiometer to high resistance
  • Shorted the limiting resistor
  • Reduced the potentiometer resistance
  • Resulted in closed eye
  • Continued reduction of potentiometer resistance
    resulted in a blown Emcore VCSEL
  • Probing the AOC board design resulted in another
    blown VCSEL

10
Repairs
  • Replaced all damaged components on the Emcore
    design
  • Testing the repaired board resulted in closed
    eyes again
  • Tried to systematically tune potentiometers
  • Careful tuning did not result in open eyes
  • Carefully probed inputs and outputs

11
Test Signals
Output signal for D21.5 input obtained using the
optical test equipment
D21.5 input signal obtained using the probe
12
Test Signals Cont.
  • Tried using PRBS7 test signal as input

PRBS7 input obtained using the probe plotted
beside the clock signal
13
The Magic Probe
  • Probing between the laser driver and the VCSEL
    resulted in the Magic Probe Effect
  • The optical output signal formed excellent eye
    diagrams when the probe leads were placed between
    the laser driver and the VCSEL

14
Magic Probe Results
Eye diagram for optical output for PRBS7 input
with probe
15
Possible Explanations
  • The use of smaller potentiometers may have
    resulted in the overdriving of the laser driver
    chip
  • Board layout issues
  • Unbalanced circuit
  • Weird layout effects

16
Testing Hypothesis
  • Replaced the bias potentiometer with a larger 50
    kO potentiometer from the practice board
  • Unable to obtain an open eye diagram by tuning
    the potentiometer
  • Can still obtain good eye diagrams using the
    Magic Probe
  • Effectively rules out overdriving hypothesis
  • Only leaves potential layout issues

17
Next Week
  • Complete second board layout
  • Second board layout will use passive components
    to try to replicate the effect of the probe on
    the board
  • Design review for next board fabrication?
  • Place order for board fabrication
  • Start Final Report
  • Assemble second board
  • Get board blessed in chapel

18
Board Layout Review
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