Xilinx ISE 9.2i Demo board

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Xilinx ISE 9.2i Demo board

• Yu-Guang Chen and Zu-Yi Zen
• Computer Science
• National Thing Hua University
• 2009/03/26

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Outline

• The FPGA board (demo board)
• Introduction to Todays Lab
• How to setup ISE with your demo board
• How to download your design in your demo board

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The FPGA board

• 4 components for the demo board
• Board ?Power wire ?Connection wire ?CD-Rom
• If you find that your package lack any one of
  these, please tell T.A. immediately!!!!!

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Todays LAB
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What to do today

• Modify your design for last weeks lab so that it
  will conform to todays requirement
• Write a 7-segment controller
• Write a debounce for the button (you can copy
  this code from the pdf file)
• Download your design on the demo board

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How to setup ISE
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Open ISE 9.2i

• Click this icon on the desktop

Click twice to open the ISE window
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New Project

• Create a project File - New Project
• Make sure that there is no ?? in your path
  (ex?? is not allowed)

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Device Properties
1
2
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Create New Source
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Add Existing Sources
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Finish New Project
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Insert last weeks design
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Add Copy of Source
1
2
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Select Added files
Add Lab3 files to this project
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Successfully Added
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Write todays design
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New Source
2
1
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Select Source Type
2
1
3
4
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Define Module
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Finish
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You can edit your code at here
2. Edit your design
1
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Check your designCheck Syntax
Click twice
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Assign pings

• After coding, you should assign pings for demo
  boards
• You can choose one of the following method to
  assign pings
• You can find more information at the document in
  CD-Rom

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Assign package pins
1
2
Select yes
3
assign package pins here
Click twice
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Save and close
2
1
close
save
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you can see .ucf file generate by the tool
2 the .ucf file
1 double click
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Alternative

• Also, you can write a .ucf file by yourself to
  assign pings
• An example for .ucf file

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What to assign?

• 7-segment control signal
• Clock
• Switch
• Push bottum

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7_segment

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7_segment pins
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Clock pin

• The FPGA board provide a clock signal whose pin
  number is P77

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DIP_SWITCH pins

• Switch up 0
• Switch down 1
• (Just choose one)

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PUSH_BUTTON pins

• Click 0
• unclick 1
• (Just choose one)

This is boards reset You cant use it
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Other pins

• Please refer Ulinx-spartan3-ST3-????_V11_20060503
  .pdf which you can get from the CD in the board
  box.

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How to download design to the board
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What to do

• You should ask tool to synthesis your design and
  generate the .bit file
• Then use ISEs iMPACT to download the .bit file
  to the FPGA
• Then, you can see the result on your board

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Before the download Step

• You have to unplug the jumper called M0 on your
  board.

This one
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Connect demo board to Power and your computer
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synthesis your design and generate the .bit file
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Run synthesis
2
1
double click
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Warning!!!!!

• If there is any error message, you should try to
  debug by yourself
• If it is okey, we have to ask tool to generate
  .bit file

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View error messages
Click once
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Set JTAG clock
2
3
1
Right click
4
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Generate bit file
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ignore this message
1
Click twice
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Download .bit file to FPGA
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Configure FPGA (1/4)
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Click twice
2
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Configure FPGA (2/4)
2
1
Select bit file
3
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Configure FPGA (3/4)
Right clock and select program
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Configure FPGA (4/4)
2
1