Rotary Router: An Efficient Architecture for CMP Interconnection Networks

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Rotary Router An Efficient Architecturefor CMP
Interconnection Networks

• P. Abad, V. Puente, P. Prieto, and J.Gregorio
• ISCA 2007
• Presenter Zheng Guo

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Outline

• Motivation
• Router Architecture
• Avoiding Anomalies
• Performance Evaluation
• Implementation Viability
• Summary and Conclusions

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Motivation

• The constraints change on chip
• Wide links are the norm
• Local information readily available (neighbors)
• Smaller packets
• Complex networks.
• Chip Multiprocessors (CMP)
• Consume power especially buffering schemes
• Place area pressure on caches and cores
• Need simplification
• How do we deal with issues like HOL blocking,
  adaptive routing and arbitration across a router?

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Router Architecture

• Injection into the ring
• Routing tag
• Avoid HOL blocking
• Multiple rotations
• Dual-port FIFO Buffers (DFB)
• No centralized structures
• Crossbars
• arbitration

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Router Building BlocksInput Port

• FIFO buffer and demux
• Local routing tag computation
• Ring selection
• Distance to port
• Occupancy

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Router Building BlocksOutput Port

• Multiplexer buffers
• Fair access
• Flow control with neighbor

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Router Building BlocksBuffering Management

• Dual-port FIFO Buffer (DFB)
• Central block
• Two-pair Read/Write ports

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Router Building BlocksBuffering Management

• Buffer bypass logic when output is available
• Round robin arbitration
• Delay comparable to Adaptive Bubble Router
• Area is buffer bound comparable/better than
  traditional routers

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Operations

• Arbitration
• Independent of the of output ports
• Local
• Simple FIFO buffer and no HOL blocking
• Router complexity grows linearly in of ports
• Low complexity adaptive routing

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Flow Control
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Flow Control

• Virtual cut through with neighbors
• Bubble flow control for injection limitation
• Deadlock freedom relies on bubble flow control
• Occupation based flow control in a ring
• Levels injection probability across input ports
• Misrouting
• Multiple ring traversals marks packet for
  misrouting
• Take first available port

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Avoiding AnomaliesDeadlock, Livelock
Starvation

• Bubble flow control ensures progress and deadlock
  freedom
• Livelock with very low probability
• Misrouting is randomized
• Probability of bubble following cyclic paths is
  very low
• Starvation is mitigated with adaptive injection
  rates
• Ring buffer allocation is unfair between
  injection ports and router ports
• Dynamically throttle injection (required bubble
  count) at router ports

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Analysis of Power Consumption

• 88 torus
• More activity in the router increases power
  consumption
• More movement time but less execution time
• Superior latency reduces execution time -gt
  reduces energy-delay product (EDP)
• Number of turns are low
• Multiple flow control protocols smooth out the
  flows
• Never travel more than one clycle

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Overall Performance
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Summary and Conclusions

• A novel architecture
• Decentralized and scalable, No HOL
• No virtual channels
• Topology agnostic
• Component complexity independent of node degree
• However, need to better understand effect of
  message size, e.g., cache lines

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ThanksQuestions?