Title: ECT 358
 1ECT 358
- Lecture 14 
 - Digital Signal Processing
 
  2A man is rich according to what he is, not 
according to what he has.
- There is that maketh himself rich, yet hath 
nothing there is that maketh himself poor, yet 
hath great riches. Proverbs 137 
  3Signals and Sampling
- Analog Input 
 - Discrete Time Samples 
 - Manipulation of Numbers 
 - Mostly zero 
 - Has non-zero value only at the sample points 
 - Output at sample points approximately equals the 
value of the continuous signal evaluated for the 
sample point 
  4Signals and Sampling 
 5Discrete Linear System
-  Input is convolved with another function to 
produce an output 
  6Generalized Discrete Linear System 
 7Difference Equation
-  Discrete data stream, x(n), is stored in a 
shift register  -  Each stage of the shift register corresponds to 
 the delay operation  -  Contents of each stage multiplied by a distinct 
coefficient and summed  -  Output is fed back through a separate shift 
register with corresponding multiply and add 
operations 
  8Finite Impulse Response Filters
-  If each of the b coefficients are zero, then 
 -  Represents a Finite Impulse Response (FIR) 
filter 
  9Finite Impulse Response Filters
- Operations are delay, multiply, and accumulate 
the result 
  10Finite Impulse Response Filters 
 11A Simple FIR Filter
  12Moving Average Filter Diagram 
 13 Eight Point Moving Average Filter 
 14 Eight Point Moving Average Filter
//MovAvg.v //A simple moving average filter to 
illustrate FIR filter implementation //Uses an 8 
point filter //Assumes 8-bit samples module 
MovAvg(Y_out,temp, X_in, clk, reset) input 
70 X_in input clk, reset output 70 
Y_out output 100 temp reg 100 temp 
 reg 70 Y_out reg 70 samples06 //reg
 20 k integer k 
 15 Eight Point Moving Average Filter
always _at_(posedge clk or posedge reset) if 
(reset) begin for(k  0k lt 6k  k1) 
 begin samplesk lt 0 Y_out lt 
0 temp lt 0 end end else beg
in temp lt samples0  
samples1  samples2  
samples3  samples4  
samples5  samples6  
X_in Y_out lt tempgtgt3 for(k0 k lt 
6 k  k1) samplesk lt samplesk1 s
amples6 lt X_in end endmodule 
 16 Finite Impulse Response Filter
//rect_prototype.v //a prototype rectangular 
digital filter example //fs  1000 module 
rect_prototype(Y_out, X_in, clk, reset) input 
clk, reset input 70 X_in output 150 
Y_out reg 150 Y_out reg 150 REG 
020 integer k 
 17 Finite Impulse Response Filter
 always _at_(posedge clk or posedge reset) if 
(reset) for (k  0 k lt 20 k  k1) begin 
REGk lt 0 Y_out lt 0 end else begin 
 Y_out lt (REG0  REG20) 32 //this 
behavior approach to multiply causes an LPM-MULT 
to be used //avoid by explicitly using power of 2 
multiplies (shift) and add (REG1  
REG19) 25 -(REG3  REG17) 
32 -(REG4  REG16) 53 -(-REG5  
REG15) 45 (REG7  REG13) 
75 (REG8  REG12) 159 (REG9  
REG20) 225  REG10250 for(k  0 
klt20 k  k1) begin REGklt 
REGk1 REG20ltX_in end end endmod
ule 
 18 Infinite Impulse Response Filter 
 19 Low Pass Filter 
 20 Low Pass Filter Response 
 21 Low Pass Filter Response
//IIR_LP.v / An infinite impulse response, 
digital low-pass filter based on a standard 
continuous time filter formulation. / module 
IIR_LP(yn, xn, clk, reset) parameter width  
8 parameter order  1 /for this filter, 
there is one b coefficient that has the value 
0.904. We multiply by 1000 to create an integer 
operation. This effectively moves the "binary" 
point 10 positions to the left. In order for the 
results to converge, we must compensate for this 
shift in both the input and the output 
data/ parameter b  10'd904 input width-10 
xn input clk, reset output 2width-10 
yn reg 3width0samples_out  wire 
3width0Data_feedforward wire 3width0 
Data_feedback //input shifted 10 positions to 
the left to line up with coefficient assign 
Data_feedforward  xnltlt10 assign Data_feedback 
 samples_outb  //output shifted 10 positions 
to the right to compensate for scale assign yn  
(Data_feedforward  Data_feedback)gtgt10 always 
_at_(posedge clk) if (reset) samples_out lt 
0 else samples_out lt (Data_feedforward  
Data_feedback)gtgt10 //delayed ouput shifted 10 
positions to the right to compensate for 
scale endmodule