ADC Analyzer Version 3.2.1

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ECE 191 Fall 2003Performance Enhancement of
Analog to Digital converter through Dithering
Sponsor The Titan Corporation
Scott Marks -RF Engineering Manager
Professor Dr. Pankaj Das Dr.
Charles Tu
National Security Solutions
Group 8 Members Chen-Hua Yang Cheng-Han
Wang Chi-man Cho Hung William Chan
Szu-Chun Tsao
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Agenda

• Software - Modeling and Theory
• Non-ideal Characteristic of ADC
• Non-subtractive Dither
• Hardware
• Noise Diode Circuit

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Gantt Chart
Finished
In Progress
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Non-idealities of ADC

• Clock Jitter
• Non-linear switch resistance
• Finite S/H Circuit BW
• Clock feed-through, charge leakage effect
• Non-ideal voltage divider, INL, DNL effect
• Mismatched comparator circuit

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Non-subtractive Dither

• Broadband dither
• Its been surveyed in the past weeks. However, it
  seems no better enhancement compared to the
  narrowband dither.
• Narrowband dither
• Different bandwidth / amplitude

Which SFDR is better ?
or
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Hardware Noise Diode Circuit Included
Tunable-Gain Op-Amp to control noise level
14Bits ADC (AD 6645)
Spectrum Analyzer
BPF

Test RF signal
Narrow-band Dither Generator
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Whats Next

• Narrow-band dither simulation on different
  amplitude and bandwidth.
• Wait for the noise source ( noise diode )
• Input Signal Mixer for Dither Signal