Detecting and Exploiting Narrow Bitwidth Computations

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Detecting and Exploiting Narrow Bitwidth
Computations

• Mihai Budiu
• Carnegie Mellon University
• mihaib_at_cs.cmu.edu
• joint work with Seth Copen Goldstein

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Motivation applications

• Media processing
• Digital Signal Processing

FFT
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Motivation hardware

• MMX
• CPU support for narrow widths
• Reconfigurable hardware

b
a
(a 0xf) (b 0x18)
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Motivation

• No programming language support
• No compiler support

int a long b
int a a (a gtgt 16) 0xf0
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Types

• The type of an integer value describes
• sign (signed or unsigned)
• width in bits
• information about each bit
• bit is constant (0 or 1)
• bit is dont care (x)
• cannot predict bit -- dont know (u)

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Why?

• You dont have to implement
• dont care bits
• constant bits
• This may enable you to exploit hardware more
  efficiently, increasing performance

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The Type Inference
1. Sign inference 2. Width inference (forward) 3.
Width inference (backward) 4. Constant
propagation (forward) 5. Dont care discovery
(backward)
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The Type Inference Algorithms(from 10000 feet)

• Forms of abstract interpretation
• I/O values are assigned types conservatively
• Iterate until a fixed-point is reached
• Data-flow at the bit level
• Low complexity O(n2 w)

.
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Constant Propagation
u00uu
u001u

u0uuu
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Dont Care Propagation
xxuuu
xxuuu
xxuuu
In

Out
xxuux
xxuux

• lsb out bit from lsb in bit
• msb out bit from all in bits

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Mixing
u00uu
u001u
xx0uu
xx01u
xxuuu
xxuuu

u0uuu
xxuux
xxuux
The mixing phase just takes bitwise the best of
the information provided by the two propagations.
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Circuit Reduction forReconfigurable Hardware
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Circuit Reduction for Reconfigurable Hardware--
after synthesis --
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C Program Size Reduction
G721 from Mediabench
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Conclusions

• Finding useless bits in a computation as a type
  inference problem
• Efficient algorithms exhibited (data-flow
  analysis)
• Big performance gain for reconfigurable hardware
  benchmarks (up to 95)
• Effective even for C programs (e.g. 7 dynamic
  size reduction)