Self-heating investigation of bulk and SOI transistors

1
Self-heating investigation of bulk and SOI
transistors

• Pierre-Yvan Sulima, Hélène Beckrich, Jean Luc
  Battaglia, Thomas Zimmer
• University of Bordeaux 1, France
• ST Microelectronics

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Preface

• This presentation deals
• with bipolar transistors
• with heat transfer
• but
• Heat transfer is material dependant
• MOS BJT gt Si
• Results are valid for MOS, too ?
• So, this presentation may interest you

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Outline

• Introduction self-heating
• Measurement set-up
• Self-heating modelling
• Equivalent networks
• Predictive model
• Results, conclusion and perspectives

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Introduction macroscopic

• Self-heating
• Heating of the device due to its power
  dissipation
• Bipolar transistor
• P IC VCE IB VBE
• DT P ZTH

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Introduction impact

• Electrical Power -gt T changes
• Temperature variation
• Mobility variation
• E-gap variation
• IC, IB variation
• Electrical power variation
• Feedback convergence problems for electrical and
  physical simulators
• Limit of operation in high power region

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Measurement set-up step 1
-gt VCE(t)

• Bipolar transistor

-gt VBE(t)
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Calibration Measure VBE(T), step 2

• IB const
• VCE VCElow
• Variation of T
• 27C -gt 50C
• Measure of VBE

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Dynamic behaviour Trise(time)

• From VBE(t)
• And VBE(T)
• -gt Trise (t)
• New method which permits to take into account the
  temperature rise _at_ VCEVCEmin gt Mixdes05

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Electrical modelling of Trise(t)

• State of the art(VBIC, MEXTRAM, HICUM)

• Results

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New thermal self-heating model

• The differential equation describing heat
  transfer is
• ? thermal conductivity, W/mC
• c specific heat, J/kgC
• ? material density, kg/m3
• T temperature, C
• ?/c? thermal diffusivity, m2/s

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Geometric presentation
Transistor, HBT
Schematic system representation with cylindrical
co-ordinates bidimensional axisymmetric geometry
Schematic system representation with Cartesian
co-ordinates
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Boundary initial conditions

• Initial condition t0,

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Analytical problem resolution

• Calculation of the thermal impedance
• Trise(t) Pdiss(t) ZTH(t)
• Transform into the Laplace domain and solution of
  differential equation

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Comparison

• Standard
• Thermal impedance
• Step response

• New model
• Thermal impedance
• Step response

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Results (1)

• Comparison between the standard (double
  exponential) and new model
• a 1E2B2C 0.5x10 µm device

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Results (2)

• Measurement for different Ib currents _at_ different
  power dissipation
• a 1E1B1C 0.8x6.4 µm device

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Equivalent networks

• Electrical-thermal networks for SPICE
  simulation
• Represent the thermal impedance as accurate as
  possible
• Have as few parameters as possible
• The parameters have a physical meaning

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Equivalent network - recursive parallel

• Recursive parallel network

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Resultsrecursive parallel

• Recursive parallel network
• N10
• RTH, R, C, k
• 4 parameters have to be determined
• Independent of cell number

-10dB/dec
- 45
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Time domain

• Step response of the parallel recursive circuit

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Predictive Modelling

• Calculate the thermal impedance as a function of
  the layout data
• Numerical approach
• Geometrical approach

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Numerical approach

• HBT cross section 3 layers
• back end (Isolation and metallization)
• Active layer (intrinsic transistor deep trench
  isolation)
• Substrate
• Resolving the Heat transfer equation with the
  specific initial and corner conditions

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Results (RTH f(emitter area))

• Physical approach
• Numerical calculation takes some minutes
• Actually some problems with CTH scaling

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Geometrical approach
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RTH calculation
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Results output characteristics
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HBT on SOI
Schematic Cross section
TEM Cross section view
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Results - Layout investigation
Type Active surface µm2 E(emitter) Active E-surface µm2 RTH K/W
Q1 0.882 12 0.150.49 3100
Q2 0.8775 5 0.151.17 5400
Comparison to bulk Si HBT SOI 2 HBT bulk (!
Very rough estimation !)
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Discussion

• Limit of the standard model
• Development of a new accurate model
• Resolution of heat transfer differential equation
• Physical model
• Representation with equivalent networks
• The parallel recursive network is very accurate
• 4 parameters needed
• Use in compact circuit modelling

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Under work predictive model

• Numerical approach
• Geometrical approach
• Both approaches give good results
• Calculation time
• Usability
• Methods applied to HBT on SOI

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Perspectives

• Thermal coupling between transistors
• Power device modelling
• Layout optimisation
• Investigation of the thermal behaviour of MOS
  transistors ? (cooperation)
• Tools
• Methods
• Equations
• Extraction methods

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Thanks for your attention

• The paper is open for discussion.