Page allocation to reduce access time of physical caches

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Page allocation to reduce access time of physical
caches

• Brian K Bray
• William L Lynch
• M J Flynn

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Paging with TLB
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Key words

• Identity function
• A function which does not have any effect.
  It always returns the same value that was used as
  its argument
• Unified cache
• Balances the load between instruction and data
  fetches

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Associative-mapped cache

• In associative cache, Any block from main memory
  can be placed anywhere in the cache.
• This block is uniquely identified by its MM block
  
• number (tag)

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Conventional address translation
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Main points

• Set-selection bits are required to
  begin
• cache access.
• Associativity bits represent the
  increase
• in cache size
• The Bin bits indicates the page location
• No of Bins Cache size per degree of
  associativity / page size

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• Requires translation before cache access
• This requires cycle extension or an extra
  pipeline stage to do address translation.
• Offsetting some of the latency advantages of the
  low associativity cache

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Page coloring
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Effects of page coloring

• Translation in parallel with cache allow more
  time to access TLB
• Improve the cache performance

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Inclusion Benefit

• Reduce the cache coherence complexity of two
  level cache organizations.
• Screen unnecessary cache coherency traffic from
  the first level cache.
• Formula for necessary associativity of second
  level cache
• A2gt (size1/ Page size) /
  (B1/B2)

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• More general definition
• A2gt (size1/X) (B2/B1)
• Here X Minimum (size1/A1, Size of unit where
  virtual and physical addresses are
  equal)
• With Page coloring,
• X minimum( size1/A1, 2b page size)
  for bgt0

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Bench Marks

• A trace-driven simulator produced data comparing
  colored and uncolored page mapping.

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Memory Partitioning

• Main memory is partitioned into 2b sets ( reduces
  the effective main memory)
• Page allocation no longer consists of selection
  of the first element on a free list (fully
  associative)
• Rather, a colored page must be selected from the
  correctly-colored free list (set associative)
• Causes extra paging

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Conclusion

• Page coloring removes the need for address
  translation before cache access.
• Proper use of page coloring retain overall low
  latency and gain repeatable performance with
  significant OS complexity
• TLB can be accessed in parallel with cache
• Reduces the associativity needed by the second
  level cache