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Combinational Circuits with Programmable Logic Devices

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Title: Combinational Circuits with Programmable Logic Devices


1
Combinational Circuits with Programmable Logic
Devices
  • Programmable Logic Arrays (PLA)
  • Programmable Read-Only Memory
  • (PROM)

2
Programmable Logic Devices
  • Any Boolean function can be expressed in a Sum of
    Product form
  • SOP form gt AND-OR implementation
  • Programmable Logic Devices
  • Pre-fabricated building blocks of many AND/OR
    gates (or NOR, NAND)
  • Programmed by making or breaking connections
    among the gates

3
Programmable Logic Devices
Block Diagram of a Programmable Array of AND and
OR for Sum of Products Form
Inputs
Array of OR gates
Outputs
4
Programmable Logic Devices
  • Programmable Logic Array (PLA) The AND array and
    the OR array are programmable.
  • Programmable Array Logic (PAL) The AND array is
    programmable but the OR array is fixed
  • Programmable Read-Only Memory(PROM) The AND
    array is fixed and the OR array is programmable.

5
PLA 3 inputs x 4 outputs
Inputs
All possible connections are available before
programming
Programmable OR array
Programmable AND Array
Outputs
6
PLAs
  • Metal fuses are used by the manufacturer to
    establish the connections among the gates (i.e.
    between the inputs and the AND gates, and the AND
    gates and the OR gates).
  • The metal fuses can be selectively removed
    (blown)
  • A blown fuse behaves as an open circuit (i.e.
    no connection)
  • An intact fuse behaves as a short circuit.
  • Programming a PLA blowing fuses for unwanted
    connections.

7
PLAs Alternative Diagram
Shorthand notation so we dont have to draw all
the wires!
Note The number of AND gates varies
8
PLAs Example
  • F0 A B' C'
  • F1 A C' A B
  • F2 B' C' A B
  • F3 B' C A

Key to Success Shared Product Terms
9
Example Continued
A B C
Unwanted connections are blown
F0 A B' C' F1 A C' A B F2 B' C'
A B F3 B' C A
AB
BC
AC
BC
A
Note of AND gates of product terms
F0 F1 F2 F3
10
Example Continued
Fuse intact
A B C
AB
BC
AC
BC
F0 A B' C' F1 A C' A B F2 B' C'
A B F3 B' C A
A
F0 F1 F2 F3
11
0
Non-complement
1
Complement
12
Programming A PLA
  • A PLA program table is needed to program a PLA
  • A PLA may be Mask Programmable or Field
    Programmable
  • Mask Programmable PLA customer/designer submits
    a PLA program table to manufacturer.
  • Manufacturer produces a custom made PLA
  • Field Programmable PLA PLA can be programmed by
    the user/designer using special instruments
    (device programmers)
  • The size of a PLA is determined by three factors
  • of inputs, of product terms, of outputs

13
Design with PLA
  • Given a function or a group of functions
  • 1. Minimize function(s) using any method (K-map,
    McCluskey, etc). gt minimal SOP form.
  • Minimize the number of product terms
  • Number of literals is not important.
  • Check each function and its complement.
  • 2. If multiple functions, look for common product
    terms.
  • 3. Derive PLA table
  • 4. Draw PLA diagram
  • of AND gates of distinct product terms
  • of OR gates of outputs.
  • Draw a X for each connection

14
Design with PLA
  • F1 ? m(0, 1, 5, 6, 7)
  • F2 ? m(2, 3, 4, 7)
  • Realize the above two functions using the
    smallest PLA.

15
8 x 4 PROM
Fuse Fixed Connection
m1
m2
Programmable OR Array
m3
m4
m5
m6
m7
Fixed AND Array Generates All Minterms
16
8 x 4 PROM
17
Programmable ROM
  • 1. 2N x M PROM N inputs and M outputs
  • gt can implement M Boolean functions of N
    variables.
  • 2. PROM implements the sum of minterms form of
    functions gt no need to minimize
  • gt easier to design with PROM than PLA

18
Boolean Functions with PROM
  • Realize the following three functions using a
    3-input, 3-output PROM
  • F1(A, B, C) AB B'C
  • F2(A, B, C) (AB'C).(A'B)
  • F3(A, B, C) A BC
  • Step1 Put expressions in standard SOP form
  • F1(A, B, C) ? m ( 1, 5, 6, 7)
  • F2(A, B, C) ? m ( 0, 1, 3, 6, 7)
  • F3(A, B, C) ? m ( 3, 4, 5, 6, 7)
  • Step2 Draw PROM diagram

19
Boolean Functions with PROM
20
Programmable ROM
  • Conceptually, an 2N x M PROM can be viewed as a
    memory device
  • capacity of 2N words
  • each word is M bits wide
  • The N inputs represent the address of the memory
    location to access in the PROM
  • The N bit address is decoded using an N to 2N
    decoder.
  • The decoder activates one memory location which
    is read.

21
PROM as a Storage Device
  • Store the following data in a PROM of appropriate
    size in the sequence indicated
  • 0001 10
  • 1010 01
  • 1101 10
  • 0110 01
  • 0101 01
  • 1110 01
  • 1001 11
  • 0110 10
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