Title: M. van Veelen
1Failing scaling and Roadmapping to new
Architectures
- Can we use the existing architectures with new
and future technology for the next generations of
processing machines in Radio Astronomy?
Martijn van Veelen Jaap Bregman
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3Spatial multiplexing (partition antennas)
FAILING SCALING
4Spectral multiplexing
Transpose
FAILING SCALING
5Scaling chip design principles
- It is hardly possible to synchronize the
processing. Different areas on chip operate on
their own decoupled clock. - In order to achieve low power/cm2 we no longer
push to run a maximum chip clock
6Coherent synchronous processing?
FAILING SCALING
7The emerging router
FAILING SCALING
8Beamforming and two-step DFT
FAILING SCALING
9X
F
FAILING SCALING
log(computations)
break-even point OFX OXF
log(antennas)
WSRT
ALMA
LOFAR
SKA
10Required FX operations
FAILING SCALING
32bit
3
2
70-700MW
?
?
11Trends in the correlator architecture
- Spatial correlator function no longer determines
the geometrical layout - The technology (chip-speed) no longer determined
the geometrical layout - Coherent correlation is no longer implemented by
synchronouns processing - The connectivity between correlator and
calibration is a priority driver rather than the
input of the correlator. - Function and technology are no longer determining
the architecture - The power consumption / cooling and the
correlator output connectivity drive the
architectural optimizations.
12Function ? Form
technology
?
?
?
function
technology
architecture
function
13Function ? Form
technology
Spatial nulling
Spectral blanking
?
?
?
function
FX
XF
Round robin
XF
FPGA
CPU
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15Time-To-Market
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18NRE
technology
HW platform
SW platform
Processing software
function
Application Specific
lifecycle flexibility
reliability
COTS HW
maintenance
system costs (manufacturing)
Power consumption
TCO
19What is effective RD?
- The development paths for existing correlators
based on Hero-approach vs. the just-in-time
integration approach.
20The Hero-approach
21The just-in-time integration approach
22RD
Processing Software
Manufacturer Effort (Multi-Customer)
Operating System
COTS Correlator Platform
Optimal RD effort (time x man-power)
HW-centric Control Software
RD effort
Resource Optimized Platform
RD effort
Aging Technology
23SKA ?
LOFAR
System Costs
WSRT
Development Time
24Roadmap architecture
Function
Architecture
Technology
time
25Roadmap
sensitivity
power consumption
availability
surveyspeed
serendipity
Operating Modes
maintenance
F
X
flexibility
Functions
XF
FXF
FX
FFX
?
synchronous
asynchronous
round-robin scheduling
?
Architecture
4D torus
Ring network
fanout
Crossbar
Gb routers
Infinibandswitches
AdvancedTCA
Multi-core microproc
ASIC
gate arrays
FPGAs
Multi-core FPGA
Micro proc
?
Emb.Mult. FPGA
Technology
130nm
90nm
? nm
time
26Conclusions
- Architectures emerge but not in a predictable
manner. - Technology advances stepwise rather than
continuously, it cant be predicted on a
timescale of half a decade. - Given the emerging optimization criteria related
to TCO, a one-to-one scaling of existing
architectures will fail. - The technology advances with Moores Law are not
sufficient to provide a suitable architecture for
SKAs central processor. - We can benefit from platform-specific RD
invested by industrial machine manufacturers, if
we pursue shorter TTM. - Considering the development paths of processing
machines so far, this indicates the need to shift
our RD focus - Roadmapping helps to address the key issues on
the right level of abstraction, somewhere in
between the function and technology.
27Failing scaling and Roadmapping to new
Architectures
- Can we use the existing architectures with new
and future technology for the next generations of
processing machines in Radio Astronomy?
Martijn van Veelen Jaap Bregman