A BackEnd Design Flow for Single Chip Radios

1
Transmitter
Output power 0dBm (1mW) Low data rate ( 10
kbps) Simple modulation scheme (on-off keying)
Narrowband system (center frequency _at_ 1.9GHz)
2
Prototype TX

• Improve efficiency by
• Co-designing the matching network with low-power
  amplifier for optimal efficiency.
• Ropt for PA and Ropt for matching network are not
  equal to the global Ropt..
• Using low loss capacitive transformers.
• Boosting the oscillator input drive and
• removing the pre-amplifier.

3
Co-design Framework
Design values are determined as a function of
conduction angle, peak current and loss in the
matching network using Fourier analysis.
4
Fabricated Die
ST Microelectronics 0.13?m Technology
Transmitter
Low Power Amplifier
5
Test Board
Component Test Chip
Radio Test Chip
Y. H. Chee, Susan Mellers
6
Low-Power Amplifier (LPA)
Co-design matching network with LPA for optimal
efficiency Use of low loss capacitive transformer
for impedance matching Cascoded transistor to
mitigate oxide breakdown and reduce loading
effects of the amplifier on the output tank
7
LPA Performance

• Centre frequency
• 1.9 GHz
• Output Power
• 1.41mW (1.5 dBm)
• Efficiency (PAE)
• 30

8
Future Work Non Linear PA

• Class E Non-linear PA
• Transistor operates as switch
• Zero switch current during off and zero switch
  voltage (ZVS) during on ? Zero device power
  dissipation.
• Output network determine drain voltage and
  current waveforms to achieve ZVS condition

9
Non-linear PA

• Example Series Tuned Class E PA