Computer

1
Chapter 5
Computer Organization (?????)
2
OBJECTIVES
After reading this chapter, the reader should be
able to
Continued on the next slide
3
OBJECTIVES (continued)
4
Figure 5-1
Computer hardware (subsystems)
5
5.1
CENTRAL PROCESSING UNIT(CPU)
6
Figure 5-2
CPU
7
5.2
MAIN MEMORY
8
Table 5.1 Memory units
Unit------------ kilobyte megabyte gigabyte terab
yte petabyte exabyte
Exact Number of bytes------------------------ 210
bytes 220 bytes 230 bytes 240 bytes 250
bytes 260 bytes
Approximation------------ 103 bytes 106
bytes 109 bytes 1012 bytes 1015 bytes 1018
bytes
9
Figure 5-3
Main memory
10
Note
Memory addresses are defined usingunsigned
binary integers.
11
Example 1
A computer has 32 MB (megabytes) of memory. How
many bits are needed to address any single byte
in memory?
Solution
The memory address space is 32 MB, or 225 (25 x
220). This means you needlog2 225 or 25 bits, to
address each byte.
12
Example 2
A computer has 128 MB of memory. Each word in
this computer is 8 bytes. How many bits are
needed to address any single word in memory?
Solution
The memory address space is 128 MB, which means
227. However, each word is 8 (23) bytes, which
means that you have 224 words. This means you
need log2 224 or 24 bits, to address each word.
13
Memory Types

• RAM (Random access memory)
• SRAM (Static RAM) (flip-flop gates)
• DRAM (Dynamic RAM)
• ROM (Read only memory)
• PROM (programmable)
• EPROM (erasable programmable)
• EEPROM (electronically erasable programmable)

14
A simple flip-flop circuit
Set
Reset
15
Setting the output of a flip-flop to 1
16
Setting the output of a flip-flop to 1 (continued)
17
Setting the output of a flip-flop to 1
18
Another way of constructing a flip-flop
19
Figure 5-4
Memory hierarchy
20
Figure 5-5
Cache
21
5.3
INPUT / OUTPUT
22
Figure 5-6
Physical layout of a magnetic disk
23
Figure 5-7
Surface organization of a disk
24
Figure 5-8
Mechanical configuration of a tape
25
Figure 5-9
Surface organization of a tape
26
Figure 5-10
Creation and use of CD-ROM
27
Table 5.2 CD-ROM speeds
Speed ------------ 1x 2x 4x 6x 8x 12x 16x 24x 32x
40x
Data Rate------------------------ 153,600
bytes per second 307,200 bytes per
second 614,400 bytes per second 921,600
bytes per second 1,228,800 bytes per
second 1,843,200 bytes per second 2,457,600
bytes per second 3,688,400 bytes per second
4,915,200 bytes per second 6,144,000 bytes
per second
Approximation------------ 150 KB/s 300 KB/s 600
KB/s 900 KB/s 1.2 MB/s 1.8 MB/s 2.4 MB/s 3.6
MB/s 4.8 MB/s 6 MB/s
28
Figure 5-11
CD-ROM format
29
Figure 5-12
Making a CD-R
30
Figure 5-13
Making a CD-RW
31
Table 5.3 DVD capacities
Feature--------------------------------- single-s
ided, single-layer single-sided,
dual-layer double-sided, single-layer double-sided
, dual-layer
Capacity------------ 4.7 GB 8.5 GB 9.4 GB 17 GB
32
5.4
SUBSYSTEM INTERCONNECTION
33
Figure 5-14
Connecting CPU and memory using three buses
34
Figure 5-15
Connecting I/O devices to the buses
35
Figure 5-16
SCSI controller (Small Computer System Interface)
Daisy Chain
36
Figure 5-17
FireWire controller (IEEE 1394)
37
Figure 5-18
USB controller (Universal Serial Bus)
38
Figure 5-19
Isolated I/O addressing
39
Figure 5-20
Memory-mapped I/O addressing
40
5.5
PROGRAM EXECUTION
41
Figure 5-21
Steps of a cycle
42
Figure 5-22
Contents of memory and register before execution
43
Figure 5-23.a
Contents of memory and registers after each cycle
44
Figure 5-23.b
Contents of memory and registers after each cycle
45
Figure 5-23.c
Contents of memory and registers after each cycle
46
Figure 5-23.d
Contents of memory and registers after each cycle
47
Figure 5-24
Programmed I/O
48
Figure 5-25
Interrupt-driven I/O
49
Figure 5-26
DMA connection to the general bus
50
Figure 5-27
DMA input/output
51
5.6
TWO DIFFERENT ARCHITECTURES
52
Two different architectures

• CISC (Complex Instruction Set Computer)
• Intel
• RISC (Reduced Instruction Set Computer)
• PowerPC