EE 30357: Semiconductors II: Devices Lecture Note

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EE 30357 Semiconductors II DevicesLecture Note
14 (02/12/09)Review of MOSFETGrace Xing

• Outline
• Previously reviewed MOS capacitor C-V curves
  (high and low frequency)
• MOSFET band diagram
• The concept of VCH the channel voltage (NOT
  equal to VGate!)
• MOSFET family I-Vs (ID versus VD at varying VG)
• Derivation this class
• Transfer curves (IDS versus VGS at fixed VDS)
  later in class

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The energy band diagram of the NFET across the
channel (a) and along the channel (b), with zero
voltage between the drain and the source. Figure
7.12
3. To pull down this barrier, we need apply a
positive bias on the gate
1. This barrier height controls how many
electrons in the channel
2. To form a conducting channel, we need pull
down this barrier
3
(a) With a voltage on the drain with respect to
the source, the depletion region width varies
along the channel. So does the voltage across the
channel at any given point. (b) The energy band
diagrams normal to the gate at source and at
drain. Here the drain voltage is higher than the
source voltage, so the depth of the channel
varies along its length. (c) The energy band
diagram along the channel with no voltage on the
drain with respect to the source, and with
positive bias applied drain to source. Figure
7.13
Can you draw the potential profile (Vch) along
the pink dashed line? Hint it is not equal to
Vgate! Imagine flowing current without potential
drop only superconductors can do
Two knobs Gate tuning EB Drain tuning the
sliding ride for carriers
Graph-concept - nMOSFET
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(a) With a voltage on the drain with respect to
the source, the depletion region width varies
along the channel. So does the voltage across the
channel at any given point. (b) The energy band
diagrams normal to the gate at source and at
drain. Here the drain voltage is higher than the
source voltage, so the depth of the channel
varies along its length. (c) The energy band
diagram along the channel with no voltage on the
drain with respect to the source, and with
positive bias applied drain to source. Figure
7.13
3 V
5 V
0 V
Gate at a fixed potential
1 V
3 V
Q assuming this n-MOS has Vth1V, can you sketch
the band diagram perpendicular to the gate of the
two locations indicated by the arrows?
Two knobs Gate tuning EB Drain tuning the
sliding ride for carriers
Graph-concept - nMOSFET
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The ID-VDS characteristics of a typical MOSFET.
The threshold voltage for this MOSFET is 0.5 V.
Figure 7.14
Feature 1 threshold voltage lt 0.5 V
Feature 2 the current saturates (J
qnv)? Since n is determined by VGS, it must be
due to v.
Reason 1 saturation velocity of carriers (short
channel)
Reason 2 electric field at the source end
saturates (long channel)
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The energy band along the channel for three
different values of VDS. The current saturates
because, as the drain voltage increases, the
slope (and thus the electric field) increases
faster at the drain end, but at the source end,
there is little change. Thus the current is
limited by the field at the source end. Figure
7.15
Due to its simplicity, we will consider constant
mobility model first Reason 2 electric field
at the source end saturates (long channel devices)
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Sheet charge and current equations
Sheet charge (ns) 1016x100x10-7 cm-21011 cm-2
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Long-channel MOSFET model with constant mobility
(Lgt 5mm) Step 1 calculate the channel charge
velocity
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Long-channel MOSFET model with constant mobility
(Lgt 5mm) Step 2 calculate the channel charge
density Qch 0, VGS VT, ? ID 0 Qch ?,
VGS gt VT. Recall C-V of a MOSFET
The NFET. Longitudinal and transverse electric
field directions are indicated. Figure 7.16
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Can you locate threshold condition (VT) from the
C-V below?
Above the threshold voltage, channel charge is
determined by the gate oxide capacitor
VT
Concept-Graph-Equation
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7-13
(a) With a voltage on the drain with respect to
the source, the depletion region width varies
along the channel. So does the voltage across the
channel at any given point. (b) The energy band
diagrams normal to the gate at source and at
drain. Here the drain voltage is higher than the
source voltage, so the depth of the channel
varies along its length. (c) The energy band
diagram along the channel with no voltage on the
drain with respect to the source, and with
positive bias applied drain to source. Figure
7.13
Band diagram of gate is flat along y, but that of
channel bends along y ? Voltage drop between the
gate channel (i.e. across the oxide) varies
with y
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The saturation current and saturation voltage are
defined. Figure 7.17
Valid only in this region
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Long channel FET model with constant
mobility Step3 solve for current by solving 1st
order differential equation
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The current predicted using Equation (7.19)
(solid lines) is only valid up to the point where
VDS VGS - VT. After that the current saturates
(black dashed lines), whereas Equation (7.19)
would predict a decrease and eventually a sign
reversal in the current (colored dashed
lines). Figure 7.18
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Long channel FET model with constant
mobility Saturation current
VS 0, VG 1 V, VD 2 V, VT 0.5 V
VG-Ch at source end ? VG-Ch at drain end ?
1 - 0 1 V gt 0.5 V
1 - 2 -1 V lt 0.5 V

• Why current saturates?
• E-field near the source is saturating
• Channel is pinching off (n ? 0) near the drain

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The ID-VDS characteristics of the NFET of Example
7.2 results from the simple model. For this
device W/L 5, tox 4 nm, Cox 8.63 10-3
F/m2, and mn 500 cm2/Vs. Figure 7.19
Non even spacing or even spacing? Square law or
linear law model