MicroChip 3

1
MicroChip 3

• UNCA ECE 406
• April 18, 2007

2
C variable view

• int state
• int nxtState
• int oldRST
• int oldDIN
• int oldCLK
• volatile int RST
• volatile int DIN
• volatile int CLK
• int DOUT

3
C initialization

• / many of these choices are arbitrary /
• nxtState state 0
• oldRST 0
• oldDIN 0
• oldCLK 0

4
C Loop

• while (1)
• if (CLK ! oldCLK)
• processClockTrans()
• if (RST ! oldRST
• DIN ! oldDIN)
• processDataTrans()

5
Process Clock Transaction

• processClockTrans()
• oldCLK CLK
• if (CLK)
• state nxtState
• processDataTrans()

6
Process Data Transaction

• processDataTrans()
• oldRST RST
• oldDIN DIN
• if (RST)
• nxtState 0
• else
• nxtState (2stateDIN)3
• DOUT (state0 DIN0)
• (state2 DIN1)

7
Action at reset

• Program starts at reset vector
• goto FSM
• Loading the OSCAL p 21
• pre-programmed internal callibration value
• Location FFh contains callibration value
• Loaded into W before reset
• Suggest loading at first instruction
• FSM movwf OSCAL

8
Things that might be done

• Examine STATUS to determine how reset
• Could awaken on sleep on pin change
• Register 03h
• Set OPTION to allow wakeup
• On pin change or reset
• But how to avoid resetting the registers
• Requires use of OPTION instruction

9
Setting I/O direction

• TRIS register
• Input (high-impedance) 0
• Output 1
• We need xxxx1011 (0Ah)
• Requires TRIS instruction
• movlw 0Ah
• tris GPIO
• The GPIO does seem odd

10
Setting the initial output

• Not really specified in the problem
• GPIO register
• Register 06h
• Buffer for I/O
• Can read an output pin
• bcf GPIO,BOUT

11
Initialize registers

• clrf STATE
• clrf NXTST
• clrf OLDRST
• clrf OLDDIN
• clrf OLDCLK

12
Start the loop

• Check for a CLK transition
• FSMLP
• movf GPI0,W
• andlw fdh (BCLK)
• xorf OLDCLK,W
• btfsc STATUS,Z
• goto CLKTRANS

13
Check for RST transition

• movf GPI0,W
• andlw f7h (BRST)
• xorf OLDRST,W
• btfsc STATUS,Z
• goto DATTRANS
• goto FSMLP

14
Check for DAT transition

• movf GPI0,W
• andlw feh (BDAT)
• xorf OLDRST,W
• btfsc STATUS,Z
• goto DATTRANS

15
Start the loop

• Check for a CLK transition
• FSMLP
• movf GPI0,W
• andlw fdh (BCLK)
• xorf OLDCLK,W
• btfsc STATUS,Z
• goto CLKTRANS

16
Clock transition

• CLKTRANS
• movf GPIO,W
• andlw BCLK
• movwf OLDCLK
• btfsc STATUS,Z
• goto FSMLP
• movf NXTST,W
• movwf STATE
• goto DATTRANS
• Only update STATE here!

17
Data transition -- save old

• DATTRANS
• movf GPIO,W
• andlw BDAT
• movwf OLDDAT
• movf GPIO,W
• andlw BRST
• movwf OLDRST

18
Reset check

• btfsc STATUS,Z
• goto NOTRST
• clrf NXTST
• goto FSMLP

19
Next state and output

• decf STATE,W
• btfsc STATUS,C
• goto ST0TRANS
• btfsc STATUS,Z
• goto ST1TRANS
• goto ST2TRANS

20
State 0 transition

• ST1TRANS
• clrf NXTST
• btfsc GPIO,BDIN
• goto ST1D1TRANS
• bsf GPIO,BDOUT
• goto FSMLP
• ST1D1TRANS
• incf NXTST,F
• bsc GPIO,BDOUT
• goto FSMLP

21
Arithmetic approach

• DATTRANS
• movf STATE,W
• addf STATE,W
• btfsc GPIO,BDAT
• addlw 1
• movwf NXTST
• sublw 3
• btfsc STATUS,C
• movwf NXTST

22
Table approach part 1

• movf STATE,W
• addf STATE,W
• btfsc GPIO,BDAT
• addlw 1
• call TBLLKUP

23
Table lookup

• TBLLKUP
• addlw NXTSTTAB
• movf PCL
• NXTSTTAB
• retlw 10h
• retlw 01h
• retlw 02h
• retlw 00h
• retlw 01h
• retlw 12h

24
Table approach part 2

• call TBLLKUP
• movwf NXTST
• btfsc NXTST,4
• goto SETOUT1
• bcf GPIO,BDOUT
• goto FSMLP
• SETOUT1
• bcf NXTST,4
• bsf GPIO,BDOUT
• goto FSMLP

25
Perils of PIC Assembly

• Quirky instruction set
• Quirky special registers
• Quirky addressing
• Quirky initialization
• Variations with processors

26
Data memory PIC18

• Data memory addressed by 12 bits
• Most instructions can address 8 bits
• BSR, Bank Select Register
• Provides access to addition sets
• But must be set before access
• Processors vary in number of banks
• Similar to segments in x8086
• Leads to far and near pointers

27
Program memory PIC 18

• Program memory address by 22 bits
• PC is 21 bits
• Last bit is always 0
• Held in three registers
• Only PCL (low 8 bits) are directly accessable
• Use PCLATH to write other two
• Program memory can be read/written
• While running

28
Program branching

• GOTO and CALL instructions
• Use two words of program memory
• Holds 20 bits of PC
• Entire 2-Mbyte memory range
• BRA (unconditional) instruction
• 11 bit offset (actually 12) of PC
• BC (conditional) instruction
• 8 bit offset (actually 9) from PC

29
C compilation

• Huge criticism of PIC
• Too many variations
• Unusual memory struction
• No good stack support
• Addressing relative to stack pointer
• But the x8086 wasnt that go either

30
C compilation

• Not bad with the right chip
• Pin I/O
• With TRISx and PORTx variables
• Some printf
• Through UARTS
• Interrupt handlings
• Hard working optimization

31
PIC examples

• MadLab
• PIC Source
• MicroChip Application Notes
• John Hopkins ECE448