DAQ for Photodetector Test Facilities

1
DAQ for PhotodetectorTest Facilities

• Meeting at Edinburgh on 11.6.2001
• Franz Muheim, Stephan Eisenhardt (Edi)
• Paul Soler, Andrew Pickford (Gla)
• via telephone
• Steve Wotton, Val Gibson (Cam)
• Dave Price (IC)
• later private conversation
• John Bibby (Ox)
• Review options for DAQ of Photodetector test
  facilities
• Review available/needed hardware/software
• Define strategy for the next months

LHCb UK meeting Bristol, 28.6.2001
Stephan Eisenhardt University of Edinburgh
2
Options

• Options
• a) UK L0-L1 demonstration system
• b) ALICE PILOT
• c) UK FED SEQSI
• Aims
• DAQ at test facilities close to final DAQ in RICH
• use experience and support within UK

3
UK L0-L1 demonstration system I

• demonstration no TTCrx?, no I2C, not final
  layout
• L0 Oxford
• PINT (Marco Adenolfi)
• first implementation as FPGA (OK for test
  facilities)
• finally as ASIC (in RICH)
• time scale end of 2001 (very confident)
• L1 Cambridge
• HV steering circuit (DC 0-10V) included as
  additional card
• time scale earlier than L0 (very confident)
• mini series (10 boards)
• available with demonstration system
• including high speed optical fiber link, serial
  link and software

4
UK L0-L1 demonstration system II

• PCI Flic SLINK are available form CERN
• (800 2x150 CHF per system, 6 weeks delivery
  time)
• JTAG
• L0
• routed through to steer pixel chip
• to program FPGA (PINT)
• L1
• to program FPGA
• parallel port device of JTAG Technologies works
  with pixel chip
• FPGA programming doesnt work yet
  (hardware(?)/software(!?) problem)
• if JTAG doesnt work to program the FPGAs
• a different solution can be found for the rare
  cases where the EEPROMs of the FPGAs need an
  update
• VME crate (LHCb finally will use VME frames
  without backplanes)
• for 5V power and mechanical setup only
• will be reused in standalone setup for RICH
  maintenance

5
ALICE PILOT

• PIXIE board (Ox)
• 3 boards exist (1 at CERN, 2 at Oxford)
• 2 PCBs can be made up (provided all parts are
  available on short term)
• JTAG
• routed through to steer pixel chip
• ALICE PILOT
• runs presently at 10MHz (can be altered to 40MHz
  by replacing (40ns?20ns) memory and reprogramming
  FPGA)
• 155MHz oscillator difficult to get hold off (only
  needed for the serial link ? could be replaced by
  a 40MHz oscillator)
• new production run possible (with bug-fixed PCB)
  (Fabio Formenti)
• time scale 3 months, 3000-4000 CHF / board
• VME crate for bus and power NI interface
  mandatory

6
UK FED SEQSI I

• PIXIE board (Ox)
• 3 boards exist (1 at CERN, 2 at Oxford)
• 2 PCBs can be made up (provided all parts are
  available on short term)
• JTAG
• routed through to steer pixel chip
• DAC encoder (IC, Dave Price)
• available in 3 months (very confident) _at_ 100
  pounds/card
• multiplexes 4 digital to one analog signal _at_
  40MHz
• only one FED needed for one HPD !!
• stand alone or VME based

7
UK FED SEQSI II

• SEQSI CORBO
• just one of each available in UK (Edi)
• FED
• 4 in UK (2 Cam, 1 Edi, 1 on loan to Velo)
• VME crate for bus and power NI interface
  mandatory
• this is the only option which enables us to
  switch back to MaPMTs quickly if we decide this
  in October...

8
Software

• a) DAQ for UK L0-L1 demonstration system
• to be evolved from existing code for FED based
  DAQ along with development of L1 board
• b) DAQ for ALICE PILOT
• existing bundle of Labview VIs
• c) DAQ for UK SEQSI FED
• existing C based code (DOS shell applications)
• d) to steer pixel chip via JTAG
• existing bundle of Labview VIs
• d) can be combined with a), b) or c) without
  problem

9
Agreed Strategy I

• aim to use UK L0-L1 demonstration system for the
  test facilities at Glasgow and Edinburgh
• availability at the beginning of 2002 gives room
  to use this DAQ from the beginning of the series
  tests
• the needed additional software development for
  the DAQ is small
• meanwhile do not adopt the ALICE PILOT DAQ
• dont invest into the learning curve of not known
  DAQ software
• dont invest in purpose specific hardware which
  will be out of use after a few months
• but adopt UK SEQSI FED option as a temporary
  DAQ
• reuse available hardware with only small
  investment (DAC encoder)
• reuse existing DAQ software (similar to final DAQ
  software)
• good support within UK

10
Agreed Strategy II

• drawback
• due to hardware limitations (SEQSI, CORBO) only
  one facility can be developed until the UK L0-L1
  demonstration system is available
• (in Edinburgh)
• gain
• this allows for better knowledge transfer Edi?Gla
  !
• (due to work in the same laboratory...)
• review options/situation in October when
  developments and prospects become more clear
• safety aspect I
• in the case we decide to for the MaPMTs, this is
  the only way to do that without losing time
• safety aspect II
• in the case the UK L0-L1 demonstration system
  fails or we go for MaPMTs
• an additional SEQSI CORBO can be digged up to
  set up a second test facility at Glasgow