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R

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... CCD. Design of small. Prototype of FPCCD. FPCCD. fabrication. Sample test ... LOI: Letter of Intent (?) FPCCD VTX. Short term plan. Study of fully depleted CCD ... – PowerPoint PPT presentation

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Title: R


1
RD Status of FPCCD Vertex Detector
  • Dec.1, 2006
  • Yasuhiro Sugimoto
  • KEK

2
Introduction
  • FPCCD Vertex Detector
  • Accumulate hit signals for one train and read out
    between trains ? Completely free from EMI
  • Fine pixel of 5mm (x20 more pixels than
    standard pixels) to keep low pixel occupancy
  • Fully depleted epitaxial layer to minimize the
    number of hit pixels due to charge spread by
    diffusion
  • Two layers in proximity make a doublet (super
    layer) to minimize the wrong-tracking probability
    due to multiple scattering
  • Tracking capability with single layer using
    cluster shape can help background rejection
  • Three doublets (6 CCD layers) make the detector
  • Multi-port readout with moderate (20MHz) speed
  • Operation at low temperature to keep dark current
    negligible (r.o. cycle200ms)

3
  • Baseline design for GLD

4
Challenge of FPCCD
  • Fully depleted
  • Lorentz angle
  • tanqrHmB, rH Hall coefficient1, m
    mobility (m2/Vs), B Magnetic field (T)
  • Stronger E-field in dep. layer (gt104V/cm 1V/mm)
    gives saturation of carrier velocity and smaller
    m
  • ? Epi layer of 15mm would be OK
  • Radiation tolerance
  • Small pixel (5 mm)
  • Fast readout speed(20 Mpix/s)
  • Multi-port readout
  • H-Register in image area
  • Low noise
  • lt50 e (total) ? lt 30 e (CCD)
  • Low power consumption
  • Metal layer
  • Low drive pulse voltage
  • Output circuit
  • Large area10x65mm2(in)/20x100mm2(out)
  • Thinning(lt50 mm)
  • Full well capacity
  • gt104 e is OK
  • Readout ASIC
  • Necessary for proto-type ladder

5
Roadmap
2006
2007
2008
2009
2010
ILC Project (Detector)
DCR
DOD
LOI
Construction
Study of fully Depleted CCD
2nd round
3rd round (prototype ladder)
Design of small Prototype of FPCCD
FPCCD fabrication
Sample test
Sample test
Sample test
Development of readout ASIC for prototype CCD
FPCCD VTX
Wafer thinning and the support structure
Other 2nd priority RDs
DOD Detector Outline Document DCR Detector
Concept Report LOI Letter of Intent (?)
6
Short term plan
  • Study of fully depleted CCD
  • New CCDs will be delivered mid December
  • Epi-layer 30mm / 15mm
  • Pixel size 24mm
  • Study of charge spread and Lorentz angle
  • Radiation tolerance
  • Study of support structure
  • FEA study of Si-Carbon foam-Si structure

7
Charge spread
  • Front illumination
  • Standard
  • Back illumination
  • Deep2
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