Indium Phosphide Bipolar Integrated Circuits: 40 GHz and beyond

1
InGaAs / InP DHBTs with gt 370 GHz f? and fmax
using a Graded Carbon-doped Base
M. Dahlström, Z. Griffith, M. Urteaga, M.J.W.
Rodwell University of California, Santa Barbara,
CA, USA X.-M. Fang, D. Lubyshev, Y. Wu, J.M.
Fastenau and W.K. Liu IQE Inc, Betlehem, PA,
USA griffith_at_ece.ucsb.edu, mattias_at_ece.ucsb.edu,
805-893-8044, 805-893-5705 fax
2
Motivation for InP HBTs
Parameter InP/InGaAs Si/SiGe benefit
(simplified) collector electron velocity 3E7
cm/s 1E7 cm/s lower tc , higher Jbase electron
diffusivity 40 cm2/s 2-4 cm2/s lower tbbase
sheet resistivity 500 Ohm 5000 Ohm lower
Rbbcomparable breakdown fields Consequences, if
comparable scaling parasitic reduction 31
higher bandwidth at a given scaling
generation31 higher breakdown at a given
bandwidth Problem for InP SiGe has much better
scaling parasitic reduction Present efforts in
InP research community Development of
low-parasitic, highly-scaled, high-yield
fabrication processes Why mesa DHBT?Continue to
advance the epitaxial material for improved speed
3
High speed HBT some standard figures of merit

• Small signal current gain cut-off frequency (from
  H21)
• Maximum power gain (from U)

Collector capacitance charging time when
switching
4
How do we make HBTs faster
Required transistor design changes required to
double transistor bandwidth
key device parameter required change
collector depletion layer thickness decrease 21
base thickness decrease 0.7071
emitter junction width decrease 41
collector junction width decrease 41
emitter resistance per unit emitter area decrease 41
current density increase 41
base contact resistivity (if contacts lie above collector junction) decrease 41
base contact resistivity (if contacts do not lie above collector junction) unchanged
(C s, t s, C/I s all reduced 21)
easily derived from geometry / resistivity /
velocity relationships
5
How do we improve gate delay for digital ICs ?
6
Scaling Laws, Collector Current Density, Ccb
charging time
Collector Field Collapse (Kirk Effect)
Collector Depletion Layer Collapse
Collector capacitance charging time is reduced
by thinning the collector while increasing
current
7
Challenges with Scaling
Collector-base scaling Mesa HBT collector under
base Ohmics. Base Ohmics must be one transfer
length ? sets minimum size for collector
Solution reduce base contact resistivity ?
narrower base contacts allowedUnavailable
solution decouple base collector
dimensions Compromise physically undercut the
collector semiconductor Emitter Ohmic
Resistivity must improve in proportion to
square of speed improvements Current Density
self-heating, current-induced dopant migration,
dark-line defect formation Loss of
breakdownavalanche Vbr never less than collector
bandgap (1.12 V for Si, 1.4 V for InP)
.sufficient for logic, insufficient for
power Yield !!submicron InP processes have
progressively decreasing yield
8
Fast DHBTs high current density ? high
temperature
Prof. Ian Harrison
Caused by Low K of InGaAs
Max Trise in Collector

• Thermal conductivity of InGaAs 5 W/mK
• Thermal conductivity of InP 68 W/mK
• Average Tj (Base-Emitter) 26.20C
• Measured Tj26Cgood agreement

Conclusion Minimize InGaAs thickness in
subcollector
9
High f? DHBT Layer Structure and Band Diagram
Vbe 0.75 V, Vce 1.3 V
Emitter
Collector
Base

• Compared to previous UCSB mesa HBT results
• Thinner InP collectordecrease ?c
• Collector doping increasedincrease JKirk
• Thinner InGaAs in subcollectorremove heat
• Thicker InP subcollectordecrease Rc,sheet

10
UCSB mesa HBT process flow
11
UCSB mesa HBT process flow
12
UCSB mesa HBT process flow
13
UCSB mesa HBT process flow
14
UCSB mesa HBT process flow
15
InP HBT limits to yield non-planar process
Emitter contact
Failure modes
Etch to base
Liftoff base metal
Emitter planarization, interconnects
Yield quickly degrades as emitters are scaled to
submicron dimensions
16
SEM of device before polymide passivation
Profile of high frequency device -- 0.6 um
wide emitter by optical lithography 1.0 um thick
-- emitters as small as 0.4 um wide
fabricated -- self aligned base contact as
small as 0.3 um on both sides of emitter
Front view Emitter contact width 0.6 um, base
mesa width 1.2 um Physical emitter width 0.5
um, collector undercut 0.2 um Area collector /
Area emitter 1.0 / 0.5 2
17
Device resultsDC and Gummel plots for 150 nm
collector

• Device dimensions
• device area 4.2 ?m2
• emitter metal 0.7 x 8 mm
• emitter junction 0.6 x 7 mm
• base mesa width 1.7 ?m

DC gain 8-10 nc/nb 1.04/1.55 Vbr,CEO 5 V Jc
8 mA/?m2 _at_ Vce2.5 V Jmax 12 mA/?m2 _at_ Vce1.5 V
18
Device resultsDC and rf
19
S-parameters and delay terms
Smith chart
Summary of delay terms
S21/20
S12 x5
S11
S22
Extraction ?ex10 O-?m2 vc4.5?105 m/s

• Device dimensions
• device area 4.2 ?m2
• emitter metal 0.7 x 8 mm
• emitter junction 0.6 x 7 mm
• base mesa width 1.7 ?m

20
Base metal resistance for very narrow contacts

• Resistance of e-beam deposited metals higher than
  book values.
• Metal resistivity increases when tbase metal
  lt1000 A

• An important contributor to Rbb for the base
  contact (Pd/Ti/Pd/Au, 25/170/170/630)
• ?s,base metal 0.5 O/sq ? 3-8 O added to Rbb
  for 0.3 ?m base contact width
• this will generate thermal instability if Rex
  is very low(how low?)

21
Base-collector capacitance variation with Je
Ccb/Ic ? 0.26 ps / V
22
Rf performance over time, under bias
time 3 minutes, f? and fmax ? 308 GHz
time 3 hours, f? and fmax ? 308 GHz
DC bias conditions Vcb 0.35 V, Vce ? 1.3 V J
8.5 mA/?m2
23
UCSB static frequency divider designs w/ DRC 2003
model
UCSB/ONR Z. Griffith
Divider speed w/ base mesa width Divider speed w/ base mesa width 2.1 um 1.7 um 1.3 um
Rex 15 Wmm2 Rbb 25 Wmm2 113 127 143
  Rbb 20 115 129 145
  Rbb 15 117 132 148
  Rbb 10 120 135 152
Rex 10 Rbb 25 119 133 149
  Rbb 20 121 135 151
  Rbb 15 123 138 154
  Rbb 10 125 141 158
24
Conclusions

• We have achieved record performance for f? in a
  InP mesa DHBT370GHz, along with maintaining
  simultaneously high fmax375GHz
• Much of the gains attributed to the work on the
  process and the collector
• physical undercut
• thinning active material2000A to 1500A
• doping higher to push Jkirk,max higher
• thinning InGaAs subcollector contact500A to
  125A, remove heat

• What are we concentrating on now in our mesa
  process
• Contact resistance need to drop Rex for
  simultaneous increase in ft and fmax
• Find way to increase base metal thickness
  high ft and without lowing fmax
• Alternative base grade schemedual grade doping
  and alloy

Acknowledgment This work is supported by the
Office of Naval Research under contract
N00014-01-1-0024
25
S-parameter measurement test structure

• On wafer LRL calibration
• LRL calibration using on wafer Open,
  Zero-length through line, and delay line
• OSLT used to check U in DC-50 GHz band
• Probe pads separated by 460 ?m to reduce p-p
  coupling
• RF environment not ideal, need thinning, air
  bridges, vias for parasitic mode suppression

26
SEM of patterned passivation w/ interconnects
Patterned polyimide passivation plasma etch
Coplanar waveguide interconnects