TRD electronics: Status report

1
TRD electronics Status report

• Wim de Boer, Chan Hoon Chung, Florian Hauler,
• Mike Schmanau, Andreas Sabellek, Georg Schwering
• IEKP - Universität Karlsruhe (TH)
• RWTH-Aachen I

2
Outline

• QM2 status of boards
• Environmental Stress Screening
• - Follow-ups
• 3. Summary

3
Status of TRD electronics

• Status U-Crate / UPD-Box
• August / September Environmental Stress
  Screening of U-Crate / UPD-Box
• UPD-Box was tested in standard configuration with
  4 bus bars. Could not qualify new version since
  the terminal blocks did not arrive in
  time.Terminal blocks will be present in FM UPD.
• September Retest of U-Crate communication with
  frontends under extreme thermal temperatures to
  reproduce problem seen during ESS.Seems to
  depend on cable length. (later) UDR2 is ok!
• Ready to prepare TVT. TRD and Tracker will test
  together.TVT will take place at Terni in March
  2006.
• Mike Schmanau is waiting to test FM/FS DC/DC
  converters.As soon as CSIST is ready, he will
  come together with someone from the Tracker
  collaboration to CSIST.
• Go ahead for UDR2/UPSFEv2/S9011AUv2/S9011B/UBPv2
  FM/FS production will be given until February
  1st.

4
ESS Follow-up UDR communication with frontends I
UDR2 specific test Set DAC value and read back
via front end simulator. First 4 channels are
drawn over DAC setting Normal output at 55C
(left), problem at -25C. Gets back to normal at
slightly higher temp.

• Needs to be investigated.
• First guesses
• Timing problem, serial ADC shorter cables than
  original ones.
• 2.7 V issue, lower than normal 2.8VBut /-2.0V
  voltage measurement on linear regulators did
  not show anything unusual.

5
ESS Follow-up UDR communication with frontends
II

• Retested UDR2 communication at extreme
  temperatures in thermal chamber at CERN.
• Could reproduce the problem.
• /- 2.0V Voltages were OK!
• Extended cable length between U-Crate and UFS-Box
  to nominal length which will be used in flight.
  This solved the problem.
• (we used shorter cables to save money)
• Timing seems to get modified with temperature.
• No problem board design is ok!

6
Follow-up mechanics

• QM2 U-Crate and UBPv2 fit very tightly. Corners
  of UBPv2 had to be rounded.Small region in
  U-Crate with larger tolerance was milled off.
  Sollution Backplane size will be reduced a bit
  for FM production.
• Cable slots are quite narrow due to stiffener
  bars. Sharp corners on the edges of crate walls.
  Could damage wire insulation. Sollution Round
  corners.Will send NCR to Marco.

7
Summary

• Communication problem between UDR2 and frontends
  was investigated and identified. Board is ok.
• Ready for FM/FS DC/DC converter test. Mike
  Schmanau will come to Taiwan.
• Ready for TVT preparation which is scheduled for
  March 2006.
• Would like to start FM production soon, so that
  we have the boards in summer.

8
Thermo-Vacuum-Test

• Decision was made to perform TVT together with
  Tracker electronics.
• Opportunity seems to be in Terni.
• Testing date will be in March 2006.
• We are ready to prepare it now!
• Electronics have to be disassembled to be
  cleaned. (Much work for UPD)
• Do we have to retest vibration afterwards?
• If yes, shouldnt we rather test new version of
  UPD-Box? Terminal blocks have arrived?

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TRD(U)-Electronics Overviewafter weight reduction
Ucrate TRD electronic crate UBP TRD
backplane UPD TRD power distribution box
V2
V2
UPSFE TRD power supply for front end UDR TRD
data reduction board JINF data concentrator and
link to higher DAQ for TRD UHVG TRD high
voltage generator UFE TRD front end UTE TRD
tube end UHVD TRD high voltage distributor
removed USCM USCM functionality covered partly by
JINFV2
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Status of TRD electronics II

• Status of Boards
• UDR2 went through ESS tests unmodified
• UPSFEv2 small resistor modification in status
  monitor lines. New firmware from VK.
• UHVG termination resistor modification in
  Lecroy Bus (VK)
• UBPv2 corners filed off
• S9053U FM/FS documentation sent to GA and then
  to CSIST. PCB/PCA ongoing.
• S9048 Voltage for ESS raised output to 2.7V.
  Further increase to 2.8V for FM/FS. Transformers
  were modified at CAEN and sent to CSIST.
  Documentation sent to CSIST. PCB/PCA ongoing.
• S9056 Due to UHVG problems, voltage increased
  to 5.2V. PCB ongoing. PCA stopped until ordered
  resistors have arrived.
• S9011AUv2 New firmware from VK.
• S9011B Six boards were in Perugia. One was
  coated there and sent to us. Unfortunately the
  components were not correctly glued. Coating had
  to be removed at CSIST, components glued and
  then recoated.

11
TVT configuration
UPD-Box
U-Crate
UFS (Front End Simulator)