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Booths Compact Signed Multiplication Algorithm

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Booth's Compact Signed Multiplication Algorithm. Salient Features : ... 3. Reduces number of multiplication steps. ... Booth's Algorithm : Essential Facts - 3 ... – PowerPoint PPT presentation

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Title: Booths Compact Signed Multiplication Algorithm


1
Booths Compact Signed Multiplication Algorithm
  • Salient Features
  • 1. Applicable for signed binary integers only.
  • 2. Employs 2s complement scheme to represent
    ALL signed binary integers.
  • 3. Reduces number of multiplication steps.
  • 4. Uses both ADD Subtract as well as right
    shift arithmetic.

2
The Task at Hand
  • Given Operand A n bit 2s complement with
    Leftmost (n-1)th bit Representing Sign
  • ( The Multiplicand ( MPD ) .
  • Given Operand B n bit 2s complement with
    Leftmost (n-1)th bit Representing Sign
  • ( The Multiplier ( MPR ) .
  • Produce the 2n bit Result C ? A X B also in 2s
    complement with leftmost bit representing sign.

3
Booths Algorithm Essential Facts
  • Ability to ADD SUBTRACT using complemented
    number
  • There exists multiple ways to compute a product.
  • Example 1
  • MPD A 2(Decimal) 0010 4 bits 2s
    complement
  • MPR B 6 ( Decimal) 0110 4 bits 2s
    complement
  • Product C A X B (0010) X (0110)
  • A X 6(Decimal)
  • A X 8 2 A X 23
    22
  • A X 01000 00100 A X
    ( 1 0 1 0 )

4
Booths Algorithm Essential Facts - 2
  • Example 2
  • MPR B 30 ( Decimal)
  • 00011110 8 bits 2s complement
  • Product C A X B A X (00011110)
  • A X 30(Decimal)
  • A X ( 24232221) A X (
    25-21)
  • Since 2n2(n-1) .2(n-k) 2(n1) 2(n-k)
  • A X ( 0 0 1 0 0 0 1 0 )

5
Booths Algorithm Essential Facts - 3
  • Result Higher Order n bits Initialized to ALL
    0s Lower n bits (Previous MPR) A 0 to the
    Right
  • Multiplier (MPR) Bits
  • a) Run of 0s OR Run of 1s ? Multiply with 0
    i.e. only Right Shift Arithmetic the Partial
    Result.
  • b) Start of 1 i.e. 1 appearing to the left of 0
    ( 10 ) Subtract MPD from higher order n bits of
    the partial Result i.e. ADD 2s complement of MPD
    to the higher order n bits of the partial result
    followed by Right Shift Arithmetic the Partial
    Result .
  • c) Start of 0 i.e. 0 appearing to the left of
    1( 01 ) ADD MPD to the higher order n bits of
    the partial Result followed by Right Shift
    Arithmetic the Partial Result .

6
Booths Multiplication Algorithm - 1
  • Step 0(Pre Processing) Equate the sizes of
    Multiplicand (MPD) A as well as Multiplier (MPR)
    B both to n bits by sign Extension.
  • Step 1(Initialization) Set up higher order n
    bits of the Partial Result C All Zeros 0s
    Lower Order n Bits Multiplier (MPR) B.
  • Operation Counter n (For n bit Case).
    Set up 2s Complement of MPD A D.
  • A dummy multiplier bit b_-1 0 to the
    Right of the Result (MPR B).
  • Copy MPR B in some other place for
    future reference E .
  • Step 2 Consider the value of the bit pair
    consisting of current MPR ( Rightmost n bits of
    the Result) lsbit (LSB) b_0 together with the
    dummy multiplier bit b_-1.
  • Step 3 WHILE (Operation Counter gt 0 ) DO

7
Booths Multiplication Algorithm - 2
  • Step 4a. If b0 b-1 0 0 OR 1 1
  • Right Shift Arithmetic the partial Result (C)
    MPR (B)
  • So that c0 comes to b(n-1) , b0
    goes to b-1
  • Step 4b. If b0 b-1 0 1 Then C ? C PLUS
    MPD (A) Ignore Carry
  • Right Shift Arithmetic the partial Result (C)
    MPR (B)
  • So that c0 comes to b(n-1) , b0
    goes to b-1
  • Step 4c. If b0 b-1 1 0 Then
  • C ? C PLUS 2s Complement of MPD
    (D) Ignore Carry
  • Right Shift Arithmetic the partial Result (C)
    MPR (B)
  • So that c0 comes to b(n-1) , b0
    goes to b-1
  • Step 5 Decrement Operation Counter . Go To
    Step 3.

8
Booths Multiplication Example - 1
  • Size of MPD (A) MPR (B) 4 bits.
  • Hence size of Result (C ) 8 bits.

9
Booths Multiplication Example - 2
  • Multiplicand (MPD) A 1110 -2
    (Decimal)
  • Multiplier (MPR) B 0101 5
    (Decimal)
  • Result C A X B 10110 -10 (Decimal)
  • After Sign Extension
  • Expected 8 bit Result C 1111 0 110

10
Booths Multiplication Algorithm Steps - 1
  • MPD A 1110 , MPR B 0101
  • Step 1 Initialize Partial Result C 0 0 0 0
    4 bits
  • Set up Operation Counter 4
  • Set dummy Multiplier Bit b-1 0
  • Step 2 Consider the two rightmost multiplier
    bit pair
  • b0b-1 1 0 here
  • Step 3 C ? ( C ) PLUS 2s Complement of MPD A
    0010
  • 0 0 1 0 0 1 0 1 0
  • Step 4 Right Shift Arithmetic 0 0 0 1 0 0 1
    0 1
  • Step 5 Decrement Operation Counter 4/3

11
Booths Multiplication Algorithm Steps - 2
  • Step 6 Consider the two rightmost multiplier
    bit pair b0b-1 0 1 here
  • Step 7 C ? ( C ) PLUS MPD A 1110
  • 1 1 1 1 0 0 1 0 1
  • Step 8 Right Shift Arithmetic 1 1 1 1 1 0 0
    1 0
  • Step 9 Decrement Operation Counter 3/2

12
Booths Multiplication Algorithm Steps - 3
  • Step 10 Consider the two rightmost multiplier
    bit pair b0b-1 1 0 here
  • Step 11 C ? ( C ) PLUS 2s Comp of MPD A
    0010
  • 0 0 0 1 1 0 0 1 0
  • Step 12 Right Shift Arithmetic 0 0 0 0 1 1
    0 0 1
  • Step 13 Decrement Operation Counter 2/1

13
Booths Multiplication Algorithm Steps - 4
  • Step 14 Consider the two rightmost multiplier
    bit pair b0b-1 0 1 here
  • Step 15 C ? ( C ) PLUS MPD A 1110
  • 1 1 1 0 1 1 0 0 1
  • Step 16 Right Shift Arithmetic 1 1 1 1 0 1
    1 0 0
  • Step 17 Decrement Operation Counter 1/0
  • 8 bit Result 1 1 1 1 0 1 1 0
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