STMicroelctronics

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STMicroelctronics
STIL-based D2T Flow

• Laroussi Bouzaida
• Central RD/ Test Solutions Department
  MgrCrolles - France

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Why STIL in our D2T flow

• Use standard, vendor independent format
• Already generated by most of ATPG
• Allows to
• Reduce the D2T turn-around
• Optimize the test development flow
• Enables easier communication between EDA and ATE
  environments (LCT Initiative)

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Supported features

• ST/D2T supports Synopsys/TetraMAX Patterns IEEE
  Std.1450-1999 and P1450.1 extension

• Basic features
• Signals block
• SignalGroups block
• Timing section
• Pattern Burst
• Pattern
• Spec section

• Other Features
• Scan Structures section
• Procedures and Macros
• Call and Macro statements
• Shift block
• Condition statement
• Vectors data mapping (WFCmap)

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STIL to ATE flow
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STIL/WGL performances

• Patterns processing significantly reduced with
  STIL versus WGL format
• Up to 50 processing time saving with STIL

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STIL to ATE usage
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Current activity

• STIL reader and writer available in D2T/XUtile
  production release
• On going work with EDA and ATE companies to
  reduce the test development flow (direct STIL
  reading). Some application are emerging with Low
  Cost ATEs
• Extension to support full standard features
• Patterns List and Patterns Exec
• Domain names
• Include
• Break Point

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Conclusions

• STIL patterns format support and deployment
  within ST Divisions
• We see a significant process time reduction even
  if STIL is considered as a classicalvector
  format
• Coordination between EDA environment and users
  (like ST) to be aligned regarding the supported
  features