Media SoC platform

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Media SoC platform parallel accelerator unit

• 2005. 1.12
• JungWook, Park

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Contents

• Terminology
• Media application
• Parallelism
• Media SoC platform

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ASIC - SoC

• Application Specific Integrated Circuit
• System on Chip
• Reuse

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VLSI Programmable

• Very Large System Integration
• Programmable datapath

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Configurable - Reconfigurable

• Flexibility of structure
• The time of transformation
• At design time
• At runtime

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Granularity of reconfiguration

• Fine-grained FPGA (gate level)
• Coarse-grained reconfigurable interconnection
  based structure (PE level)
• Adaptive structure coarser grained structure

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Design process layer

• C/C level
• System level
• Transaction level
• RT level
• Lower level

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SW/HW co-design

• System optimization
• Algorithm improvement
• SW/HW partitioning
• HW improvement

CPU
Application specific block
Application specific block
Application specific block
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Block based SoC Platform based SoC

• Ideal SoC paradigm
• Complete reuse of IP blocks
• Block based SoC
• Interface problem
• Platform based
• Essential blocks
• Interface
• Develop environments

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Media SoC platform
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Media application

• Video motion picture
• Image filter
• Graphics 2D, 3D
• Audio
• Speech recognition
• Network
• Security

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Types of parallelism (1/3)

• Instruction Level Parallelism
• Pipeline
  VLIW, superscalar

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Types of parallelism (2/3)

• Thread Level Parallelism
• Independent jobs in a process
• hyperblock generation on compiler

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Types of parallelism (3/3)

• Data Level Parallelism
• 12345678910
• ((((12)3)4)5).. Dependant operations

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Video application (1/2)

• Video compress/decompress (MPEG, H.26x)
• H.264 encoder block diagram

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Video application (2/2)

• Motion estimation
• DCT (transform)
• Quantization
• RL, VL, AB coding

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Media SoC platform - re

• DLP accelerator (pixel based independent
  operations)
• Programmable
• Scalable
• Environments

uProcessor core
ILP accelerator
Buffer memory
DLP accelerator
I/O Peripherals
Communication Network
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Plan

• Find out data parallelism
• Exploit DLP by co-design methodology