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Recap

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The bit clock SCLK (CLKX, CLKR) and the ... The McBSP should begin sampling 1 clock after FS signal is detected ... A-D : 'Clocked Serial Mode' = Synchronous ... – PowerPoint PPT presentation

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Title: Recap


1
Recap
Covered in Detail
Covered with a few things missing
2
BitWise I/O
  • Toggling individual bits can be cumbersome
  • Write only registers require local copy
  • Processor must AND, OR to avoid other bits
  • Parallel Port D,E bits can be individually
    addressed in sep. registers
  • PEB7R, PEB6Retc
  • Write to the corresponding register changes that
    bit only

3
Output Synchronization
  • As mentioned in class earlier
  • Parallel Ports DEFG
  • Data register is written to ahead of time but
    will actually change on
  • PCLK/2, (default) or
  • Timer_A1
  • Timer_B1
  • Timer_B2

Ref Creating Precisely Timed Output Pulses
(R3000 UM 4.1)
4
Communicating With the Outside World
  • Serial Communication Standards and Peripherals in
    Microprocessors

5
Why Serial I/O?
Lots of Parallel I/O I/O pin limitations Tend
to be higher power Long Cables required for
externals PCB Routing cumbersome Serial I/O can
actually be faster, because cross-talk issues
can beeliminated.
R3000
A/D
D/A
Processor 2

covered
6
Serial Communication
  • Time Domain Multiplexing of Multiple Bits of Data

Example to send a xD3 from one device to another
Synchronous A shared clock is used to
precisely determine when a bit-time has
elapsed. Asynchronous The data contains
symbols which aid in synchronization, and the
devices need not have precisely the same bit
clock
This is just a general principle, there are
billions of ways to take advantage of these
general principles. We need standards for device
interoperability
covered
7
Some Examples of Serial Communication Standards
  • UART
  • SPI / Microwire
  • I2C
  • IrDA
  • TV Remote Controls
  • HDLC
  • Bluetooth The name Bluetooth was born from the
    10th century king of Denmark, King Harald
    Bluetooth (whose surname is sometimes written as
    Bluetooh), who engaged in diplomacy which led
    warring parties to negotiate with each other. The
    name of the king in Danish was Harald Blåtand and
    the Bluetooth logo is based on the H and B runes.
  • Ethernet
  • USB
  • CAN (Controller Area Network, prevalent on
    automobiles)
  • Semi-Custom

covered
8
Serial Bus Terms
  • Full Duplex data can be sent an received
    simulataneously (Ant Half Duplex)
  • Master / Slave One device is master and others
    are slaves.
  • Multi-Master Bus may have more than one master,
    arbitration scheme necessary
  • Peer-Peer No master, everyone is equal.
  • Multi-Point Several transceivers on same set of
    wires.

covered
9
Motivation ADS7818 Operation Modes
10
DSK Codec McBSP Configuration
  • When communicating with the on-board codec, the
    DSP acts as a slave, that is, all control signals
    come from the codec itself
  • The bit clock SCLK (CLKX, CLKR) and the framesync
    FS (FSX, FSR) is externally driven and active
    high
  • The McBSP should begin sampling 1 clock after FS
    signal is detected
  • Data should be sampled on the falling edge of
    SCLK (CLKR) and transmitted on the rising edge of
    SCLK (CLKX)
  • Data is 16 bits long, with the MSB first

11
PCM3006 and McBSP
32clks, viewed as a single DSP word
SYSCLK
12.288 MHz (on codec board)
12.288 MHz/256 48kHz fs LRCIN
When communicating with the PCM3006, the DSP
takes the external clock and produces all of the
control signals.
12
RS-232
  • This ubiquitous standard actually define voltage
    levels and pin connections, but not protocol
    i.e., this standard does not define character
    encoding, character framing (bits per character,
    start/stop bits, etc.)
  • Generally used with a particular set of
    asynchronous signaling standards.

Computer
Voltage gt 3V 0, lt -3V 1 (Use a converter
IC to get these levels)
RS232 Signals and pinouts
13
Universal Asynchronous Protocol
Note! This diagram neglects the inversion
specified by 232 std!
LSB First!
Bitclk baud rate
  • There are two types of parity bits even parity
    bit and odd parity bit.
  • Even parity bit is set to 1 if number of ones in
    given set of bits is odd (making the number of
    ones even).
  • Odd parity bit is set to 1 if number of ones in
    given set of bits is even (making the number of
    ones odd).
  • Protocol Variants specified by Data Bits, Parity
    Bit, Stop Bits, (and Baudrate)
  • 8-Odd-1
  • Popular Variants
  • 8-None-1, 7-E-1

This type of serial standard is useful for
talking to a wide variety of COTS devices GPS
receivers, sensors, other microprocessors, and
your PC. Benefits Simplicity
14
UART
  • Universal Asynchronous Receiver Transmitter.
  • Most PCs have one
  • Implements this set of asynchronous protocols in
    hardware
  • Configure it ahead of time for the right bit
    timing and protocol, and simple readswrites
    perform serial Comms.

15
I2C
  • Inter-Integrated Circuit bus (I2C). Patented by
    Phillips Semiconductors.
  • Half Duplex, Synchronous, Multi-Master
  • 2 signal lines SDA, SCL
  • Uses open drain drivers (contention will never
    cause damage)
  • Speeds 100kbps, 400kbps, 3.4Mbps
  • Typically on-board, or very short cable

16
2-Wire -- like I2C
many variants of I2C like interface that arent
exactly I2C.BitBanged on rabbit, but functions
are available, other processors have in HW
17
Other Synchronous Protocols
Case study -- AD9874 IF Downconverter / Digitizer
Contains 2 Serial Interfaces 1) SPI (serial
peripheral interface) port for configuration
setting frequencies, reporting status (slow
stuff) 2) Synchronous Serial Interface SSI
For fast streaming of digitized data
18
SPI
Motorola developed SPI (Serial Peripheral
Interface) protocol Signals MOSI, MISO, SCK,
/CS. Up to 1Mbps, but often bit-banged
Synchronous Serial Interface SSI For fast
streaming of digitized data
19
R3000 Serial Ports (USART)
  • 6 Serial Ports A F
  • All Asynchronous Mode w/ baud rate lt 1/8 the
    system clock rate
  • A-D Clocked Serial Mode Synchronous
  • R3000 can provide clock clk rate lt ½ system
    clock rate
  • R3000 can use clock provided by external device.
    Clk rate lt 1/6 system clock rate
  • A Processor can be booted from this serial port
    after reset.
  • Mode pins set, data is loaded in triples (addrl,
    addrh, data)

20
Baudrate Generation
  • Each serial port has an associated timer which is
    used to generate the bit clk
  • That timer isnt available for other things
  • Clock input to serial port 8xbaudrate in async
    mode (2x for sync, internal)

21
R3000 Protoboard
22
Standard Asynchronous Transmit
  • After configuration, operation is quite simple
  • Writes to SxDR take data from processor, place it
    in SxDR
  • If shift register is available, data is taken
    from the SxDR and placed into the shift register,
    where it is shifted out serially
  • Interrupts Serial Port generates an interrupt
    when
  • SxDR is available to write again
  • Enables continuous communication
  • Shift Register becomes IDLE
  • So you know when all data has actually been sent
    out

23
Standard Asynchronous Receive
  • Data is shifted into the Receive Shift Register
  • When complete Data is transferred to the SxDR
  • Note that reading this reg gives contents of
    receive register, writing writes to xmit register
  • Interrupt generated when new data arrives to the
    receive data register.

24
Using the Serial Ports
  • Setup the appropriate clock source for the
    associated timers (A2-A7) by setting the Timer A
    Control Register (TACR)
  • Set the chosen bit rate by loading the
    appropriate timer constant register (TATxR) with
    the divisor
  • Enable the appropriate pins on the output ports,
    since GPIO and the serial ports share I/O pins
  • The appropriate Serial Port Control Register
    (SxCR) must be set up to selec the serial mode
    (async, sync, external clked), the number of data
    bits, and the interrupt priority
  • If interrupts are to be used, the must be
    declared and attached

25
Sending a single character
WrPortI(SBDR,NULL,5)
Writes a 0x35 to the SBDR
Output 5
or
Ioi ld (SBDR),a
Writes the character in the accum to the serial
port
26
Example
void main() configure serial ports asm ld
a,0x35 ioi ld (SBDR),a ld a,0x36 ioi ld
(SBDR),a ld a,0x37 ioi ld (SBDR),a endasm
What gets printed to our serial terminal?
27
Dynamic C Serial Port Support
  • Functions provided in Dynamic C handle a lot of
    the tedium for simple communication (RS232.lib)
  • serXopen (19200)
  • Sets up the serial port for the baudrate desired
  • Creates its own interrupt and buffers for
    handling the data as it arrives, and sending it
    as available
  • define XINBUFSIZE 15
  • define XOUTBUFSIZE 15
  • Data will fill these buffers as it is received,
    and you may access it through the other functions
    provided
  • Data you write using the functions will fill
    these buffers, and will be automatically
    transferred to the serial port as it is ready

28
DC Serial Xmit Functions
  • serXwrite(void data, int length)
  • serBwrite(myarray, 10)
  • serXwrfree()
  • // returns an int of free bytes in the transmit
    buf
  • serXwrFlush() // flushes buffer (doesnt send)
  • serXputs() // calls serXwrite(s,strlen(s))
  • serXputc(d) //writes a single character
  • serXclose() //closes the port, disconnects irq

29
DC Serial Read Functions
  • serXgetc() // returns int with next avail
    character
  • serXpeek() // returns int with next avail
    character but doesnt remove it from buf
  • serXrdFlush()
  • serXrdFree() // returns int with free space
  • serXrdUsed() // returns int
  • serXread(data_ptr, length,timeout)
  • Reads length bytes into data_ptr or until timeout
    value expires between bytes

30
R3000 serial ports
  • HW support for UART signalling
  • SPI, Other straightforward synchronous Interfaces
  • SPI is common enough that it is supported through
    the BIOS as well, SPIinit(), SPIwrite(),
    SPIread(), SPIWrRd()
  • SW support for I2C
  • HDLC
  • Very popular?
  • IrDA
  • Comms with PDAs, Cell Phones..etc.

31
Serial Port Exam Question
  • Serial Ports
  •  
  • 5) Your R3000 based system has several interfaces
    to the outside world, one of which is a serial
    connection to a UART based serial port on a
    standard PC.  The baudrate you choose for
    communication is 10kbaud.  (note this is just to
    make the calculations easy in case you dont have
    a calculator.  You wont actually find this
    choice on your terminal program)  and the format
    is 8-N-1.  During certain operations, the PC is
    sending data as fast as the agreed upon protocol
    allows
  •  
  • a) how fast is data arriving at your embedded
    system in bytes/sec?
  •  
  •  
  •  
  • b) how much time after the stop bit arrives at
    the Rabbit do you have to read the data from the
    serial port? (to guarantee that no data is lost
    or corrupted)
  •  
  •  
  •  
  •  
  •  
  • c)  Assuming that you are trying to operate the
    serial port (serial port B) by polling, which
    register do you check? What in that register lets
    you know that a byte has arrived?
  •  
  •  
  •  
  •  

32
UDP Overview
  • TCP
  • Connection oriented a connection must be made
    before date is exchanged (i.e., a point-to-point
    protocol)
  • Stream oriented all packets are part of a
    stream, whose delivery and order are guaranteed
  • Checksum protects data integrity
  • UDP
  • Connectionless data is sent/received w/o a
    connection be formed (is targeted to a particular
    address/port) this allows broadcast messages
  • Datagrams are are sent without a guarantee of
    their delivery (faster/simpler)
  • Checksum protects data integrity

Note that while TCP takes more resources, since
generally one works with a library, the use of
the more complicated protocol may likely make
life easier.
33
TCP/UDP Socket Operation
Note that no connection is necessary, so
broadcast is possible /define REMOTE_IP
"255.255.255.255" /broadcast/
34
UDP Functions
  • sock_init() still need to initialize
  • tcp_tick() still need to run stack
  • int udp_open( udp_Socket s, word lport, longword
    remip, word port, dataHandler_t datahandler )
    Opens a UDP socket on the given port. Various
    settings for IP address (given, 0, -1), and port
    (given, 0)
  • int udp_send(udp_Socket s, char buffer, int
    len) sends a UDP packet
  • int udp_recv(udp_Socket s, char buffer, int
    len) receives a UDP packet

35
  • .
  • .
  • state 0
  • sock_init()
  • /printf("Opening UDP socket\n")/
  • if(!udp_open(sock, LOCAL_PORT,
    resolve(REMOTE_IP), REMOTE_PORT, NULL))
  • printf("udp_open failed!\n")
  • exit(0)
  • / send heartbeats /
  • for()
  • //putchar('.')
  • tcp_tick(NULL)
  • switch (state)
  • case 0
  • if (TimeElapsed(1))
  • state 1

36
C\DCRABBIT_8.10\Samples\RCM3000\TCPIP\echo_server
.c
  • while(1)
  • switch(state)
  • case 0/INITIALIZATION/ // listen for
    incoming connection
  • tcp_listen(sock,MY_PORT,INCOMING_IP,INCOMING_P
    ORT,NULL,0)
  • MS_TIMER 0L
  • state // init complete move onto next
    state
  • break
  • case 1/LISTEN/
  • if(sock_established(sock)) // check for a
    connection
  • state // we have connection so move on
  • else if (MS_TIMER gt TIME_OUT) // if 1 sec and
    no sock
  • state 4 // abort and re-init
  • break
  • case 2/RECEIVE/
  • state receive_packet() // see function for
    details
  • if (MS_TIMER gt TIME_OUT) // if 1 sec and still
    waiting
  • state 4 // abort and re-init

37
Backup
38
Watchdog Timer
  • 17-bit Counter
  • Free runs on 32.768kHz oscillator if enabled
  • When counter reaches predetermined value, pulse
    from output resets processor
  • 250ms,500ms,1s,2s
  • Software disables this reset by writing to WDTCR
    before the output reaches the predetermined
    value.
  • Resets the timer and sets the future compare
    value
  • Dynamic C is handling for us in BIOS

R3000 Users Manual 7.8 has some software
suggestions
39
Drive Control
  • Port D,F,G have configurable output drivers as
    set by PxDCR
  • 0 Default Driver drives output high and low
    depending
  • 1 Open Drain Driver drives low only,
    presumably pulled high by an external resistor

Picture Here
Ref R3000 UM Sec. 4.2
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