Electronics status

1
Electronics status

• Tests with the patched TRAP TRAP3A
• TRAP wafer tester
• OASE and the backup solution
• GTU
• ADC-PASA noise measurements in Kaiserslautern

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The patched TRAP3A
The patched TRAP3A was first tested in Karlsruhe
using an updated version of the test
software. The latest ROB is equipped with the
patched TRAP3A. Here in the Lab the data transfer
through scsn ring 1 was tested very extensively
for hours without any error.
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TRAP3 wafer tests
Status 1) The needle card is purchased 2) The
adaptor card is submitted 3) The existing MCM
tester board will be used with some additional
connectors 4) The existing FPGA designs will be
modified 5) The existing software for MCM tester
will be modified What will be tested 1) The
supply currents 2) The serial link and
pretrigger 3) All internal parts using the
CPUs 4) The parallel output 5) The half of the
ADCs using a sin wave generator The fuse ID will
be burned by a laser, so that each TRAP in the
detector will have an unique number.
4
OASE backup solution
Status 1) The components are more or less
selected - CPLD from Lattice, the same type
(but larger) like on the DCS board. A FPGA as
proposed originally is not good because of the
poor radiation tolerance. This change requires a
new more simple configuration interface, as the
SCSN is too large to be implemented in the
CPLD - SERDES chip from Texas Instruments -
Laser diode with the corresponding driver chip.
Here are the most difficulties now. The ready
solutions transceiver modules use very probably
inductances as well as many of the special driver
chips. 2) The pinout of the connector to the ROB
is fixed and compatible to both OASE and backup
solutions 3) The layout is started and can be
finished very fast, provided the problem with the
optical sender is solved 4) Mannheim has already
a working FPGA based board with the optical
sender/receiver. It can be used for testing the
OASE or backup solution board
5
GTU
Status - schematic almost done - all building
blocks identified - memory blocks frozen size
and bandwidth - FPGA pinout final - open
questions with the optical receiver
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ADC-PASA noise measurements(1)
David Muthers, Kaiserslautern
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ADC-PASA noise measurements(2)
David Muthers, Kaiserslautern
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ADC-PASA noise measurements(3)
David Muthers, Kaiserslautern