Performance Results

1
Performance Results

• The following are some graphical performance
  results out of the literature for different ATM
  switch designs and configurations
• For more information, see Tobagi 1990

2
Input Buffering

• The first set of performance results is for input
  buffering (alone) with First Come First Serve
  (FCFS) service discipline (also known as
  First In First Out (FIFO))
• Suffers from the Head of the Line blocking problem

3
Maximum Throughput for Input Buffering
N Maximum Throughput 1 1 2 0.75 3 0.6825 4
0.6553 5 0.6399 6 0.6302 7 0.6234 8 0.6
184 0.5858
4
Maximum Throughput for Input Buffering
0.8
0.7
MAXIMUM ACHIEVABLE THROUGHPUT
0.6
0.5
0
20
40
60
80
100
NUMBER OF PORTS (N)
5
Performance of Banyans

• The next set of performance results is for banyan
  multistage interconnection networks (NOTE these
  are NOT Batcher-banyans)
• FACT in a bufferless banyan, throughput T
  degrades significantly with an increase in N, the
  number of input ports, due to the blocking
  problems (path contention and output port
  contention)
• T 40 for N 32, T 26 for N 1024

6
Buffered Banyans

• Performance of banyans can be improved by adding
  internal buffers to the switch fabric at places
  where contention may occur (i.e., at outputs of
  each 2x2 module)
• This approach can increase the effective
  throughput of banyans

7
Throughput for Uniform Traffic (Single
Buffered Banyan)
1.0
N2
0.8
0.6
THROUGHPUT
0.4
0.2
0.0
0.0
0.2
0.4
0.6
0.8
1.0
OFFERED LOAD p
8
Throughput for Uniform Traffic (Single
Buffered Banyan)
1.0
N2
0.8
N4
0.6
THROUGHPUT
0.4
0.2
0.0
0.0
0.2
0.4
0.6
0.8
1.0
OFFERED LOAD p
9
Throughput for Uniform Traffic (Single
Buffered Banyan)
1.0
N2
0.8
N4
0.6
N16
THROUGHPUT
0.4
0.2
0.0
0.0
0.2
0.4
0.6
0.8
1.0
OFFERED LOAD p
10
Throughput for Uniform Traffic (Single
Buffered Banyan)
1.0
N2
0.8
N4
0.6
N16
N64
THROUGHPUT
0.4
0.2
0.0
0.0
0.2
0.4
0.6
0.8
1.0
OFFERED LOAD p
11
Throughput for Uniform Traffic (Single
Buffered Banyan)
1.0
N2
0.8
N4
0.6
N16
N64
THROUGHPUT
N1024
0.4
0.2
0.0
0.0
0.2
0.4
0.6
0.8
1.0
OFFERED LOAD p
12
Effect of Buffer Size (N 64)
0.8
0.7
B4
0.6
B2
THROUGHPUT
0.5
B1
0.4
0.3
0.3
0.4
0.5
0.6
0.9
1.0
0.7
0.8
OFFERED LOAD p
13
Effect of HOL Bypass (N 64)
0.8
0.7
HOL BYPASS
0.6
FIFO
TROUGHPUT
(WITH HOL BLOCKING)
0.5
0.4
0.3
0.3
0.4
0.5
0.6
0.9
1.0
0.7
0.8
OFFERED LOAD p
14
Buffered Banyans Summary

• Performance depends on load
• The more buffers, the better the throughput
• HOL bypass helps
• Performance still degrades as N increases, due to
  blocking effects

15
Shared Memory Switches

• The next set of performance results looks at
  buffer managment strategies for shared memory
  switches
• In particular, looks at cell loss performance for
  partitioned versus shared buffering

16
Partitioned Buffers
SHARED MEMORY
17
Cell Loss with Partitioned Buffers (?0.9)
1.0
-2
10
-4
10
-6
CELL LOSS PROBABILITY
10
-8
10
-10
10
N2
-12
10
0
20
40
60
80
BUFFER SIZE, b (per port)
18
Cell Loss with Partitioned Buffers (?0.9)
1.0
-2
10
-4
10
-6
CELL LOSS PROBABILITY
10
-8
10
N4
-10
10
N2
-12
10
0
20
40
60
80
BUFFER SIZE, b (per port)
19
Cell Loss with Partitioned Buffers (?0.9)
1.0
-2
10
-4
10
-6
CELL LOSS PROBABILITY
10
N8
-8
10
N4
-10
10
N2
-12
10
0
20
40
60
80
BUFFER SIZE, b (per port)
20
Cell Loss with Partitioned Buffers (?0.9)
1.0
-2
10
-4
10
N
-6
CELL LOSS PROBABILITY
10
N8
-8
10
N4
-10
10
N2
-12
10
0
20
40
60
80
BUFFER SIZE, b (per port)
21
Cell Loss with Partitioned Buffers (N)
1.0
-2
10
-4
10
-6
CELL LOSS PROBABILITY
10
-8
10
-10
10
p0.70
-12
10
0
10
20
30
40
50
BUFFER SIZE, b (per port)
22
Cell Loss with Partitioned Buffers (N)
1.0
-2
10
-4
10
-6
CELL LOSS PROBABILITY
10
-8
10
-10
10
0.75
p0.70
-12
10
0
10
20
30
40
50
BUFFER SIZE, b (per port)
23
Cell Loss with Partitioned Buffers (N)
1.0
-2
10
-4
10
-6
CELL LOSS PROBABILITY
10
-8
10
0.80
-10
10
0.75
p0.70
-12
10
0
10
20
30
40
50
BUFFER SIZE, b (per port)
24
Cell Loss with Partitioned Buffers (N)
1.0
-2
10
-4
10
-6
CELL LOSS PROBABILITY
10
0.85
-8
10
0.80
-10
10
0.75
p0.70
-12
10
0
10
20
30
40
50
BUFFER SIZE, b (per port)
25
Cell Loss with Partitioned Buffers (N)
1.0
-2
10
-4
10
0.90
-6
CELL LOSS PROBABILITY
10
0.85
-8
10
0.80
-10
10
0.75
p0.70
-12
10
0
10
20
30
40
50
BUFFER SIZE, b (per port)
26
Cell Loss with Partitioned Buffers (N)
1.0
-2
10
p0.95
-4
10
0.90
-6
CELL LOSS PROBABILITY
10
0.85
-8
10
0.80
-10
10
0.75
p0.70
-12
10
0
10
20
30
40
50
BUFFER SIZE, b (per port)
27
Shared Buffers
SHARED MEMORY
28
Cell Loss with Shared Buffers (?0.9)
1.0
-2
10
-4
10
-6
CELL LOSS PROBABILITY
10
-8
10
-10
10
N16
-12
10
0
10
20
30
40
50
BUFFER SIZE, b (per port)
29
Cell Loss with Shared Buffers (?0.9)
1.0
-2
10
-4
10
-6
CELL LOSS PROBABILITY
10
-8
10
-10
10
N16
N32
-12
10
0
10
20
30
40
50
BUFFER SIZE, b (per port)
30
Shared Memory Summary

• Shared buffers provide much lower cell loss than
  partitioned buffers, for uniform input traffic
  (Note the opposite may be true for non-uniform
  traffic!)
• For partitioned, cell loss gets worse with larger
  N, while for partitioned it gets better

31
Sunshine Switch

• The final set of graphs looks at the performance
  of the Sunshine switch
• Sunshine switch is based on a Batcher banyan
  design, but with recirculation lines and with the
  use of multiple banyans in parallel to
  accommodate multiple cells destined to the same
  output port

32
Batcher-Banyan Switching Fabric
RECIRCULATING QUEUE
M
BANYAN ROUTINGNETWORK
...
...
IN 1
...
BATCHER SORTER
TRAP NETWORK
CONCENTRATOR
MN
MN
...
N
...
...
...
IN N
33
SUNSHINE SWITCH ARCHITECTURE
DELAY
M
M
OUT 1
BANYAN 1
BATCHER SORTER
TRAP NETWORK
SELECTOR
CONCENTRATOR
...
...
BANYAN K
OUT N
34
Cell Loss in Sunshine Switch (K1)
p0.4
CELL LOSS RATIO
Uniform Traffic N 128 Single Banyan (K1)
0.0
0.2
0.4
0.6
0.8
M/N
35
Cell Loss in Sunshine Switch (K1)
p0.6
p0.4
CELL LOSS RATIO
Uniform Traffic N 128 Single Banyan (K1)
0.0
0.2
0.4
0.6
0.8
M/N
36
Cell Loss in Sunshine Switch (K1)
p0.8
p0.6
p0.4
CELL LOSS RATIO
Uniform Traffic N 128 Single Banyan (K1)
0.0
0.2
0.4
0.6
0.8
M/N
37
Cell Loss in Sunshine Switch (K1)
p1.0
p0.8
p0.6
p0.4
CELL LOSS RATIO
Uniform Traffic N 128 Single Banyan (K1)
0.0
0.2
0.4
0.6
0.8
M/N
38
Cell Loss in Sunshine Switch (Kgt1)
K1
CELL LOSS RATIO
Uniform Traffic N 128 p 1.0
0.0
0.1
0.2
0.3
0.4
0.5
M/N
39
Cell Loss in Sunshine Switch (Kgt1)
K1
CELL LOSS RATIO
K2
Uniform Traffic N 128 p 1.0
0.0
0.1
0.2
0.3
0.4
0.5
M/N
40
Cell Loss in Sunshine Switch (Kgt1)
K1
K3
CELL LOSS RATIO
K2
Uniform Traffic N 128 p 1.0
0.0
0.1
0.2
0.3
0.4
0.5
M/N
41
Cell Loss in Sunshine Switch (Kgt1)
K1
K3
CELL LOSS RATIO
K4
K2
Uniform Traffic N 128 p 1.0
0.0
0.1
0.2
0.3
0.4
0.5
M/N
42
Sunshine Switch Summary

• Sunshine switch was designed and prototyped at
  Bellcore
• Multiple banyans provide parallel routing paths
  to accommodate multiple cells destined for the
  same output port
• Recirculation handles the overflows
• Very promising switch design