Flexible Radio BWRC Summer Retreat 2003 Viktor wall

1
Flexible Radio- BWRC Summer Retreat 2003
Viktor Öwall

• Digital ASIC Group
• Competence Center for Circuit Design
• Department of Electroscience
• Lund University

Viktor Öwall, Digital ASIC Group, CCCD, Dept. of
Electroscience, Lund University,
Sweden-www.es.lth.se
2
Lund University

• Founded 1666
• All Faculties
• 35 000 students
• 3000 PhD students

3
Department of Electroscience

• Circuit Design CCCD
• Analog
• Mixed Signal
• Digital
• Signal Processing
• Telecommunication
• Medical Signal Processing
• Radio Systems
• MAC-layer
• Channel measurements
• Electromagnetic wave theory
• Antenna design
• etc
• www.es.lth.se

4
CCCD Competence Center for Circuit Design
Annual budget 2002 1.7M US
Companies Axis Communications Cadence Design
Systems Ericsson Mobile Platforms Ericsson Radio
Systems Infineon St. Jude Medical TeliaSonera
3 more
VINNOVA 37
University 25
Industry 38 (money and resources)
10 Professors (4 in circuit design) 4 adjunct
Professors ca 30 PhD students Manager Prof.
Jiren Yuan
5
Flexible Radio
Aim put a price on flexibility!
What flexibility? Run time, design time, ...
6
Multi Standard Radio Terminals
Multi standard device
7
Adapt to Channel Conditions

• Quality information between OSI-layers
• Fast variations dealt with at lower layers
• Slow variations can be handled up to application
  layer

Hardware must provide necessary nobs!
8
Flexible Radio
Co-funded by EU-project www.imec.be/pacwoman
Digital Baseband
Flexible
Multiple antennas
Flexible
Radio
ADC
Frontend
9
PACWOMAN

• Power Aware Communications for Wireless
• OptiMised Personal Area Networks
• EU-project 8 partners from 7 countries
• To enable low-power low-cost flexible WPAN
• Tackling all ISO layers (OFDM, UWB, MAC,
  Networking, Security, ...)

10
Flexible Radio Front-end
Digital Baseband
MIMO
Flexible
Flexible
Adaptive
Radio
ADC
antennas
Frontend
Henrik Sjöland
11
1V CMOS Bluetooth Front-End

• Common-gate LNA passive mixer
• Maximum signal headroom, i.e. no stacked
  transistors
• Wideband input and resonant output of LNA

Fredrik Tillman
12
Measurement Data and Die Photo

• 0.25mm CMOS
• 1V, 2.5mA, 2.4GHz
• 14dB Conversion Gain
• 5dB NF
• -5dBm IIP3, -15dBm CP1
• ESSCIRC 02

13
Improved Switched Tuning
To differential resonator

• Digital coarse frequency tuning
• High linearity
• Flexibility
• Doubled Q compared to single-ended scheme
• IEEE TCAS-II, 2002

Henrik Sjöland
14
Flexible Front-end
Choose frequency band Coarse tuning
Kittichai Phansathitwong
15
Flexible ADC
Digital Baseband
MIMO
Flexible
Flexible
Adaptive
Radio
ADC
antennas
Frontend
Jiren Yuan
16
Flexible ADC specifications

• Resolution, N 6 12 bits
• Sampling rate, fS 1 100 MS/s

fS
Peformance limits
The flexible range of interest
1000
FLASH
TIME INTERLEAVED
100
INTERPOLATINGFOLDING SUBRANGING
PIPELINED
10
1
ALGORITHMICSUCCESSIVE APPROXIMATION CYCLIC /
RECURSIVE
0.1
OVERSAMPLINGCONVERTERS
0.01
6
8
10
12
14
16
18
N
17
A flexible pipelined ADC
VIN

• Sampling rates fS fclk, fclk/2, fclk/3 ...
  fclk/(N/2)
• Resolutions N 3 to Nmax
• Stages can be turned on/off depending on
  requirements

Anderson, Norling, Yuan On the effects of static
errors in a Pipelined ADC, SSOCC03
Martin Andersson
18
A flexible time-interleaved ADC

• Parallel ADs calculating concurrently
• Digital calibration

19
Floating-point ADC for wireless
20
CMOS floating-point ADCs
A tested 84 bit CMOS FADC

• 0.35 mm digital CMOS
• 12-bit dynamic range
• 8-bit resolution
• 30 MS/s, 3.3V, 25mW
• ISCAS01

Johan Piper
21
Flexible Digital
Digital Baseband
MIMO
Flexible
Flexible
Adaptive
Radio
ADC
antennas
Frontend
Viktor Öwall and Peter Nilsson
22
Multiple Antennas Matrix inversion
High MIPS

• Studying trade-offs
• calculation complexity
• performance
• precision
• etc

Low MIPS
23
Implementation of Square root algorithm for MIMO
Avioding channel matrix pseudo-inversion using a
single processing element Low complexity
Numerically stable
Implementation data 0.35mm 5-Metal 3.3V
CMOS Max. freq. 80 MHz Max. throughput 128
Mb/s 190 K equivalent gates RAM size lt 3
Kbits Core area 9.0 mm2
Presented at IASTED/CSS03
Zhan Gou
24
Flexible OFDM

• Flexible mapper
• Pipelined 32-1024 points IFFT/FFT processor
• Variable choice of cyclic prefix (CP)
• Unused parts are turned off
• Compatible with the physical layer of Hiperlan2
  and IEEE802.11a

OFDM transmitter
Constellation mapper with bit loading
Flexible coder
32-1024 point IFFT processor
Signal reordering and CP insertion
D/A converter
Presented at IASTED/CSS03
Fredrik Kristensen
25
Signal Mapper
Constellation
Data from encoder
Clock gating
CG
CG
CG
CG
CG
CG
ZERO
BPSK
QPSK
8PSK
16QAM
64QAM
POWER
Power control
POWER
CONTROLLER
CONTROLLER
To IFFT

• Bitloading Maps BPSK, QPSK, 8PSK, 16QAM and
  64QAM constellation on each sub carrier
• Shift constellation and scale power for each
  sample in order to support bit loading algorithms

26
FFT/IFFT Implementation
Advantages

• High throughput
• Resize 32-1024 points
• Turn off unused stages
• Optimized bit width in each stage

0.35 µm 5ML CMOS
27
Older FFT Designs
8k points FFT for DVB (Digital Video Broadcasting)
1k points FFT for OFDM Demonstrator ca. 0.5M
Transistors
Radix 22 low complexity and reduced
memory
Shousheng He
28
OFDM chip

• Mapper, FFT/IFFT and cyclic prefix insertion
• 0.35mm 5ML CMOS
• 8.5 mm2
• Sent for fabrication

Fredrik Kristensen
29
OFDM Synchronization
Cyclic Prefix longer than impulse response of the
channel.
Presented at ICECS00
Stefan Johansson
30
Flexible Coding/Decoding Architectures

• Flexible Decoder
• Combined VA and MAP decoders
• Trade-off Window size vs. Memory req/
  Complexity/precission
• Higher rate decoders

Matthias Kamuf
31
Tack så mycket!