A 200 Mhz 8bit DigitaltoAnalog Converter

1
A 200 Mhz 8-bit Digital-to-Analog Converter

• Sam Blackman
• Professor Bob Brodersen
• June 13, 1999

2
Background

• Specifications for DAC determined by SNR
  requirements of the transmitter.
• Design decisions
• Which type of DAC to implement?
• Binary weighted
• Unit element
• Segmented
• Is matching going to be a problem?
• How about SNR?

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Design Tradeoffs
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Topology Choice

• From recent paper by Lin and Bult (JSSC, 12/98)
• Matlab simulation results of INL/DNL
• Binary DNL is clearly unacceptable
• Design Decision
• 100 Segmented
• 256 current sources
• With only 8-bit resolution, area not a concern
• Limited design time

Thanks to Sayf, Johann, and Andy. I couldnt have
printed the slides and wasted the plotter
paper/ink without you!
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Implementation

• Current Source
• Design considerations
• Noise
• Top cascoded device is main noise source
• Calculated assuming half-scale input

• For our design, W/L of 20 necessary.
• Matching
• Solved for (WL)min using Pelgroms formula
• Turned out not to be a factor (WL)min 2

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Matrix Schematic

• Blocks
• Decoder blocks
• built with standard cells implementing
  binary-to-thermometer coding
• 256 Current sources
• Bias circuitry
• Need to generated bias voltages for cascoded
  current sources.