Receiver Structures

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Receiver Structures
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Communication Model
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Sync.Detection Basic Structure
To Decoder
Input samples
SsSDetection Path
Parameter Adjustment
Parameter Estimation
Iterative Algorithm
From Decoder
Use the estimated channel parameters in the
detection path as if they were the true values
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Synchronized Detection Receiver Structure
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Receiver Task

• Inner Receiver
• To provide a good channel to the decoder based
  on the principle of synchronized Detection.
  NOTHING ELSE !
• Outer Receiver
• To decode the information

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MISCONCEPTION 1

• The BER is a useful perfromance measure for the
  inner receiver
• Remember The sole task of the inner receiver is
  to provide a good channel for the decoder.

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Performance Measure

• Inner Receiver
• Properties of the estimator
• Variance
• Unbiased
• Outer Receiver
• Bit-error-rate of the coded system

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Performance Loss

• Detection Loss of synchronized Detection
• ? SNR (dB) required to achieve the performance of
  perfect channel knowledege . (Infinite Precision
  arithmetic assumed)
• Implementation Loss
• ? SNR (dB) resulting from finite prcesion
  arithmetic

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MISCONCEPTION 2

• Performance is always close to the case of
  perfect Channel knowledge
• Only true for stativ channels

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Eample 1 DVB-S Receiver
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DVB -S Specifications

• Modulation
• QPSK
• Coding
• Concatenaded Convolutional -RS Coding
• R1/2, 2/3, 3/4,5/6, 7/8
• Operating Point
• 4.2....6.15 dB
• Symbol Rate
• 20.....44 Msymbols/s

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BER Performance
Source Digital Communication Receivers, H.
Meyr, M. Moeneclaey, S.A. Fechtel
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Example 2 DVB-T Receiver
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DVB-T Specifications

• digital terrestrial video broadcasting
• high symbol rates up to 7.4 Msym/s
• sensitive modulation 4 - 64 QAM
• net bit rate up to 31.67 Mb/s
• wide range of channels (AWGN) 0 lt?Tau lt 224 ?s
  (SFN)
• error correction
• outer coder Reed Solomon (204,188)
• inner code punctured convolutional
• BER lt 10e-9 (after RS)
• 3dB lt Es/No lt 40 dB
• challenges gt 200 transmission modes
• algorithms
• design methodology

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System Performance DVB-T
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Misconception 3

• Design effort and implementation cost of the
  inner receiver are small
• see next example

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Complexity DVB-S
Source Digital Communication Receivers, H.
Meyr, M. Moeneclaey, S.A. Fechtel
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DVB-T Complexity

• Analog part 10
• Input interfaces
• DC removal
• anti-aliasing filter
• ADC,AGC
• Digital demodulator 60
• Channel estimation and equalization
• synchronization
• control flow implemenation
• FFT (alone 30)
• Channel decoder 20
• Viterbi and RS decoder
• Miscellanous 10
• IIC bus controler, DAC

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Design Space Architecture and Algorithm

• Inner Receiver
• BOTH algorithm and architecture space exploration
• (The algorithms of the inner receiver are never
  specified by the standard)
• Outer Receiver
• ONLY architecture space exploration
• The decoder is exaclty specified in the standard