Statement Format

1
Statement Format

• MIPS assembly language statements have the
  following formatlabel opcode
  operand,operand,operand comment
• Label identifies the statement and is optional
• Opcode is the command
• There may be 0-3 operands depending on the
  instruction
• Comments are optional but helpful
• Comments can be on a line by themselves

2
Register Conventions

• MIPS assembler does not IMPOSE these conventions,
  however it does support them.
• This way functions can be easily exchanged and
  teams can work on a single product
• More later

3
Command Formats

• To make sure you use the proper command, look at
  the operands and their data type
• Some commands take 3 registers as operands
• Some take an actual number (immediate) as one of
  the operands
• Some take a label (of a variable or statement) as
  one of the operands
• Some take a memory location specified by a
  base/offset pair (Macro assembler allows labels
  for the memory location)

4
Arithmetic

• Lets translate xy7-z
• Assembler .text lw t0,y addi
  t0,t0,7 lw t1,z sub t0,t0,t1 sw
  t0,x li v0,10 syscall .datax
  .word 0y .word 0z .word 0

5
Multiply

• Lets look at Brittons appendix C about the
  Multiply instruction
• It multiplies the contents of two registers
  (remember the result can be BIG) and stores the
  lower 32 bits of the result in the LOW register
  and the upper 32 bits in the HIGH register.
• How do we work with HIGH and LOW?
• Move from High mfhi reg
• Move from Low mflo reg

6
Divide

• When we divide, there is a quotient and a
  remainder (we are in the integer world)
• Again, looking at appendix C, Divide (div) takes
  2 registers, divides the first by the second, and
  places the quotient in LOW and the remainder in
  HIGH
• Divide unsigned (divu) treats the values as
  unsigned (positive) values. There is a multiply
  unsigned (multu) also.

7
Another Expression

• Lets translate the followingxy(x312)/zkx
  mod 5
• In assemblerlw t0,xaddi t0,312lw t1,ymult
  t1,t0mflo t0should check for overflow in
  HIGH

• lw t1,zdiv t0,t1mflo t0sw t0,xli t1
  ,5div t0,t1mfhi t0
• sw t0,k

8
Basic Branching

• The branch instructions have the
  format branchop reg, label
• The branchops can be
• bgez - branch if greater or equal to 0
• bgtz - branch if greater than 0
• blez branch if less or equal to 0
• bltz branch if less than 0

9
Equality

• Branch on equality uses op reg, reg, label
• Ops are
• beq
• bne

10
Macro Branches

• The assembler will generate an equivalent set
  (1-2) of basic assembler instructions for each of
  these
• beqz reg, label
• bge reg,reg,label
• bgt reg,reg,label
• ble reg,reg,label
• blt reg,reg,label
• bnez reg,label
• b label

11
Control Structures - If

• if (altb)
• xa1
• yb-a
• aa2

• lw t0,a
• lw t1,b
• bge t0,t1,pos1
• addi t2,t0,1
• sw t2,x
• sub t2,t1,t0
• sw t2,y
• pos1 addi t0,t0,2

12
If else

• lw t0,x
• bgez t0,el
• lw t1,y
• addi t2,t1,1
• sw t2,y
• sub t0,0,t0
• sw t0,x
• b last
• el lw t3,z
• addi t3,t3,1
• sw t3,z
• sub t3,0,t0
• sw t3,y
• last sra t0,t0,1
• sw t0,x

• if (xlt0)
• yy1
• x-x
• else
• zz1
• y-x
• xx/2

13
While

• while (altb)
• aa1
• bb-1

• lw t0,a
• lw t1,b
• rep bge t0,t1,out
• addi t0,t0,1
• addi t1,t1,-1
• b rep
• out sw t0,a
• sw t1,b

14
For

• for (i0 ilt100i)
• sumsumi
• eveneven2

• add t0,0,0 li t0,0
• li t1,100
• lw t2,sum
• lw t3,even
• loop add t2,t2,t0
• addi t3,t3,2
• addi t0,t0,1
• blt t0,t1,loop
• swi, sum, even

15
Macro Instructions

• Instructions in assembler that generate more than
  one machine language instruction or a very
  different machine instruction than what is
  stated.
• Allows for smaller and faster instruction set
• Look at Britton, appendix D
• Some are just one statement.