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CurrentSwitched R2R DAC

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n-bit conversion in n clock cycles (n 1) bit conversion if ... VINt/R. VC. m clock periods (mT) 2n clock periods (2nT) Time. Integrator Output Voltage Waveforms ... – PowerPoint PPT presentation

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Title: CurrentSwitched R2R DAC


1
Current-Switched R-2R DAC
2
Voltage-Switched R-2R DAC
3
DAC Non-Linearities
4
DAC Gain Offset Errors
5
Direct (Flash) ADC
6
Successive Approximation ADC
7
Integrating ADCs
  
  •          There is a whole family of these
    circuits
  • o        single-slope
  • o        dual-slope
  • o        multi-slope
  • o        charge balance, PWM
  • o        sigma-delta (?-?) (order 1 to m)
  • None need a T(S)/H, (but may be useful)
  •   All integrate the input signal for a fixed
    time and then digitize it
  • conversion time up to 2 x 2n 2n1 clock
    periods
  •   However, the last 2 types integrate
    continuously
  •   All allow increased resolution but are slower
    than the ?-? type

8
Dual-Slope ADC
9
Integrator Output Waveforms
10
Multi-Slope ADC
  • To increase resolution, the comparator threshold
    becomes the limiting factor
  • Multi-slope uses smaller and smaller reference
    values to progressively approach the comparator
    zero at a slower rate
  • Each reference period de-integrates the
    remaining error
  • Very much more complex circuit and costly
  • Much faster than Dual-Slope for the same
    resolution - used in some DVMs
  • May also be used with Charge-Balance

11
Charge-Balance ADC
12
Integrator Output Waveforms
13
Charge Balance Performance
  • Integrates signal and reference signals
    continuously
  • I0 VREF/R then VIN VREF.Count/CountMax
  • Reduces integrator capacitor error of Dual-Slope
  • Capable of 10-8 (26-bit) performance, if you can
    wait - speed v resolution
  • DVM type ADC PWM variants

14
Sigma-Delta ADC (1)
  • Recent variant of Delta modulator and
    Charge-Balance concepts
  • Originally used for audio only, now used from
    dc to rf
  • Very high resolution up to 22bits and very
    fast 1000x faster than dual-slope
  • Very complex internal operation but quite
    simple analog circuitry
  • Uses a special (decimating) digital filter
  • Can be integrated with µCs etc
  • Minimal chip cost but support circuits
    still expensive for ultra-high performance

15
Sigma-Delta ADC (2)
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