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Summary of Run2b simulation results

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Two sublayers at 1.55 cm and 1.82 cm. 9 SS ladders in each sublayer. Ladder width 0.84 cm ... No difference between 3 geometries ... SMT only tracks are considered ... – PowerPoint PPT presentation

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Title: Summary of Run2b simulation results


1
Summary of Run2b simulation results
  • R.Demina, A.Khanov, F. Rizatdinova,
  • E. Shabalina

2
Outline
  • Early studies of SMT with additional layers
  • Track reconstruction efficiency
  • Impact parameter resolution
  • b-tagging efficiency
  • Occupancy studies for TDR
  • Recent studies of SMT degradation
  • b-tagging efficiency
  • Conclusions

3
SMT layer 0
  • Design parameters
  • No F-, H-disks
  • Double thickness of silicon in L1, L2
  • Layer 0
  • Two sublayers at 1.55 cm and 1.82 cm
  • 9 SS ladders in each sublayer
  • Ladder width 0.84 cm
  • Ladder length 12 cm
  • Readout pitch 25 µ, 256 readout channels

4
Other geometries
  • SMT layer 5
  • SMT layer 0 layer 5

5
Reconstruction efficiency single muons
  • No difference between three geometries up to
    ?lt1.5
  • In the forward region the difference in
    efficiency is due to difference in acceptance
  • With five fully efficient silicon layers addition
    of one extra layer does not change efficiency

6
Reconstruction efficiency events
  • No difference between 3 geometries
  • The effect of extra layer in case of partially
    dead SMT has not been studied

7
Reconstruction efficiency TDR study
  • Effect of L4 removal from TDR design
  • No change of tracking efficiency is seen for
    global (CFTSMT) tracks
  • SMT only tracks are considered
  • Removal of one layer has a small effect on
    reconstruction efficiency but much larger one on
    the fake rate

8
Impact parameter and pT resolution
For the purpose of IP resolution studies current
SMT is equivalent to SMTL5
SMT
12 µ
For track pT 10 GeV L0 gives a factor of 2
improvement in IP resolution
9
Impact parameter resolution events
  • SMT L0
  • ?(IP) 12.4 µ
  • SMT L5
  • ?(IP) 20.0 µ
  • SMT L0 L5
  • ?(IP) 12.5 µ

b-tagging efficiency per jet
Relative increase of b-tagging efficiency is 15
10
Occupancy studies - I
Peak occupancy
  • TDR design of layer 0
  • Two L0 sublayers at 1.78 cm and 2.47 cm
  • 6 SS ladders in each sublayer
  • Ladder width 1.28 cm
  • Ladder length 7.94 cm
  • Readout pitch 50 µ with intermediate strip, 256
    readout channels

11
Occupancy studies - II
12
Cluster sharing
  • WH 0 mb events 7.0 in L0A, 4.6 in L0B
  • WH 7.5 mb events 7.5 in L0A, 4.7 in L0B

13
SMT degradation studies b-tagging
  • after irradiation effect
  • 10 hits are lost in outer layers
  • 50 hit loss in L1 and F-disks
  • total loss a) 100 hit loss in L1 and 50
    in F-disks

14
SMT degradation b-tagging summary
Event probabilities are for WH(bb) events
  • Relative degradation of b-tagging efficiency per
    jet for irradiated scenario is 20
  • There are good chances to recover it with layer 0

15
Conclusions
  • The effect of Layer 0 on the pattern recognition
    (reconstruction efficiency and fake rate) is not
    expected to be significant. But since we havent
    studied it with full simulation fast Monte Carlo
    studies of this effect are very desirable
  • Layer 0 significantly ( by a factor of two)
    improves impact parameter resolution
  • The corresponding relative increase of b-tagging
    efficiency is about 15 (assuming same
    reconstruction efficiency)
  • a plot of dependence of b-tagging efficiency on
    impact parameter resolution in SMT would be very
    helpful. Make a request to B-id group?
  • Layer 0 is expected to recover b-tagging
    efficiency lost due to SMT radiation damage and
    general aging
  • We have to go for the best quality sensors to
    maximize the gain from Layer 0
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