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Crosstalk Noise in FPGAs

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Title: Crosstalk Noise in FPGAs


1
Crosstalk Noise in FPGAs
  • Yajun Ran
  • Malgorzata Marek-Sadowska
  • Department of Electrical and Computer Engineering
  • University of California, Santa Barbara, CA

2
Outline
  • Crosstalk noise trends in FPGAs
  • Conventional crosstalk-avoidance schemes
  • Twist switch box
  • Experimental results
  • Conclusions

3
Crosstalk noise
  • Capacitive coupling
  • Functional failure
  • Delay noise

A
A
V
V
4
FPGA structure
  • Fc
  • Fs
  • Segmentation
  • CLB size

5
Interconnects in FPGAs
  • Huge capacitance
  • Buffered wires
  • Larger logic delay

6
Crosstalk still a problem
  • Expermental settings
  • Segment lengthper stage
  • Minimum space
  • Minimum width
  • Berkeley PTM model

7
Crosstalk reduction methods
  • Coupling capacitance
  • wire spacing
  • Neighboring switching
  • shielding
  • Weak victim/strong aggressor
  • buffer sizing

8
Noise cancellation
  • Crosstalk can cause slowdown and speedup

A. B. Kahng etal. Interconnect Tuning
Stategiesfor High-Performance ICs, DATE99
9
Experiments
10
Noise distribution
  • Crosstalk requires
  • timing correlation
  • logic correlation
  • Worst-case accumulation alonga path is unlikely

11
Noise distribution
12
Noise distribution
Xi
n
Y ?
Xi
1
pdf
normal distribution
noise
13
Noise distribution
n
2n
  • normal distribution approximation
  • same mean ?n ?2n
  • different deviation ?n 2?2n

14
Previous switch boxes
5
5
4
4
3
3
2
2
1
1
subset universal Wilton Common
neighbor wires are still neighbors if they follow
the same direction. BAD for crosstalk noise!
15
Twist switch box
1
2
3
4
5
  • Neighbor relations are broken
  • Worst-case accumulation more difficult

5
5
4
4
3
3
2
2
1
1
1
2
3
4
5
16
Twist switch box - construction
  • Always exists if N gt 3
  • Can be derived from previous switch box

1
2
3
4
5
5
5
4
4
3
3
2
2
1
1
1
2
3
4
5
17
Twist switch box - construction
f(t)
Wilton
Twist
W-E
t
St
S-N
t
St
W-N
N-t2
S(N-t)2
N-E
t1
St1
S Separation factor S gt 1 S
lt N-1
W-S
t-1
St-1
N-t
S-E
S(N-t)
18
Experiments settings
  • VPR - place and route
  • 20 largest MCNC benchmarks
  • 2 segmentation schemes
  • .13um technology
  • aggressor counts

CLB
CLB
CLB
CLB
19
Experiments coupling length
Coupling Length
longest one coupling 34 blocks!
20
Experiments delay noise
8 improvement

21
Conclusions and future work
  • Crosstalk noise will be a serious problemeven in
    FPGAs
  • Trade-off among different crosstalkavoidance
    strategies
  • Twist switch box naturally suppressescrosstalk
    noise
  • More accurate noise analysis methods
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