EGGN 307 Introduction to Feedback Control Systems Lecture 38

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EGGN 307Introduction to Feedback Control Systems
Lecture 38

• Professor Kevin L. Moore
• Fall 2009
• http//engineering.mines.edu/course/eggn307a

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• Last Two Times
• 8.0 Control System design
• 8.1 Arbitrary pole placement
• 8.2 PID control
• Root Locus analysis
• This Time
• Frequency response
• 8.3 Frequency Domain Design
• Next Time
• Review for final

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PID Controllers

• PID Proportional-Integral-Derivative
• PID is one of the most frequently-used types of
  control
• PID control requires less accurate system
  knowledge than many other types of controllers
• PID controllers often must be tuned to give
  good results

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P, PI, and PD Controllers

• P controllers are pure gain C(s) KP, and can
  be used to improve both steady-state and
  transient behavior
• Characteristic equation
• PI controllers increase the System Type by one
  (one pure integrator) and are thus generally used
  to improve the steady-state response
• Transfer function
• PD controllers are generally used to improve the
  transient response
• Transfer function

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PI Controllers KD 0

• PI controllers have a pole at zero and a zero at
  some negative number

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PD Controllers KI 0

• PD controllers introduce a zero
• High frequency gain goes to infinity, which
  causes noise problems
• Thus, a pole is often introduced at a frequency
  higher than the zero

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PID Control and Frequency Response

• The PID controller equationmay be rewritten as
• Let KI 2, a 10, and plot the Bode plot vs.
  the scaled frequency wt (next slide).

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Bode Plot for Example PID Compensator
Scaled Frequency wt (rad/s)
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PID Controller Summary

• PID controllers are a type of notch (bandstop)
  compensator.
• Since Bode plots of transfer functions in series
  can be added, we can use frequency response
  techniques to design PID controllers.
• However, it is often easier to use a
  guess-and-check method in Matlab.
• Rules of thumb for guess-and-check
• Increasing KI typically increases overshoot
• Increasing KD typically increases rise time

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Design Example

• Design P, PI, and PD controllers C(s) arranged in
  the standard unity feedback configuration with
  the plant

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Design Example (2)

• Using Matlab and a guess-and-check method
• P controller
• PI controller
• PD controller

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• Last Two Times
• 8.0 Control System design
• 8.1 Arbitrary pole placement
• 8.2 PID control
• Root Locus analysis
• This Time
• Frequency response
• 8.3 Frequency Domain Design
• Control Design Specifications
• Gain and Lead and Lag design
• Next Time
• Review for final

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Control Problem

• We are usually asked to design a controller C(s)
  to meet certain specifications.
• Typical design specifications (closed-loop)
• Step response rise time
• Step response settling time
• Step response Overshoot
• Steady state error (to step, ramp, etc.)
• Stability margins
• We will translate these specifications to
  requirements on the open loop gain frequency
  response C(jw)G(jw).

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Finding G.M. and P.M from the Bode Plot
Find frequency where the phase is 180
Gain Margin is the (positive) distance below 0dB
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Finding G.M. and P.M from the Bode Plot
Find frequency where the gain is 0dB
Phase Margin is the (positive) distance above
180
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Using the Design Specifications I

• Specifications on closed loop dominant poles
• Step response rise time
• Step response settling time
• Step response Overshoot
• Given closed loop undamped natural frequency wn
  and damping ratio z, find specifications on phase
  margin and open loop crossover.
• First,

Closed-loop desired values
Closed-loop desired values
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Using the Design Specifications II

• Damping ratio implies a phase margin
• Bandwidth sets crossover

Open-loop required values
Closed-loop desired values
Closed-loop desired values
Open-loop required values
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Using the Design Specifications II

• Bandwidth sets crossover
• Note this approximation comes from a Nichols
  chart analysis
• Magcl -3 dB when Magol -6 to -7 dB for
  Phaseol in the range (-135?, -225?)

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Design Specifications Phase and Gain Margins

• Design specifications on robustness margins
• Phase margin
• Gain margin
• You already know how to read these off of the
  open loop frequency response
• Note that overshoot also implies a phase margin
  by
  You should design a controller that
  meets or exceeds both phase margin requirements
  (design for whichever is larger).

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Example

• Convert the following specifications to
  requirements on the open loop frequency response
• Step response rise time lt .5 seconds
• Step response settling time lt 1 second
• Step response Overshoot lt 15
• Steady state error to ramp lt .5
• Phase margin gt 40 degrees

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Example

• Convert the following specifications to
  requirements on the open loop frequency response
• Step response rise time lt .5 seconds
• Step response settling time lt 1 second

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Example (2)

• Convert the following specifications to
  requirements on the open loop frequency response
• Step response Overshoot lt 15
• Steady State Error to ramp lt .5
• Phase margin gt 40 degrees

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Examples (3)

• Choose wn 10, zeta 0.6

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Example (4)

• Requirement on Kv

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Frequency-Domain Controller Design

• Gain Adjustment
• A gain can be used to increase closed loop
  crossover frequency and low frequency gain at the
  expense of phase and gain margins, and overshoot.
• Lead Compensation
• Lead Compensator is used to increase phase at
  crossover frequency
• Used to meet bandwidth and phase margin
  specifications simultaneously.
• G.M. and P.M. Adjustment
• Root Locus
• Lag Compensation
• Lag Compensator is used to increase low frequency
  gain relative to high frequency gain
• Used to meet steady state error and phase margin
  specifications simultaneously.
• G.M. and P.M. Adjustment
• Root Locus (not shown below)

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Control design through gain adjustment

• Proportional control structure
• A gain can be used to increase closed loop
  crossover frequency and low frequency gain at the
  expense of phase and gain margins, and overshoot.

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Control design through gain adjustment

• Example plant open loop frequency response
• Current estimates of closed loop behavior for
  K1

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Control design through gain adjustment

• Example plant open loop frequency response
• What occurs when gain is increased?

Steady state error and rise time are improved,
but At the expense of phase margin (and overshoot)
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Closed loop step responses
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Design Example (1)

• Choose K so that the rise time is as fast as
  possible, while keeping percent overshoot 10.

Choose
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Design Example (2)

• Bode plot of open loop gain with K1

To meet phase margin spec, choose gain to place
crossover at .0512 rad/s
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Design Example (3)

• Compensated Bode plot

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Design Example (4)

• Compensated and uncompensated step responses

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Lead Compensator Design

• G.M., PM. Compensation
• Root Locus Approach

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Design Example

• Choose so that

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Lead Compensation

• Lead Compensator is used to increase phase at
  crossover frequency
• Used to meet bandwidth and phase margin
  specifications simultaneously.

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Lead Design Process Summary

• Choose K to meet bandwidth specification

• Plot Bode plot of KG(s), determine required phase
  lead compensation, add buffer of 5-10 degrees

• Choose a to add the required phase lead

• Determine new crossover frequency where the
  open loop magnitude is . Solve
  for t using

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Phase Lead Design Process Step 1

• Choose K to meet bandwidth specification
• Plot bode plot of uncompensated system
• Choose K to place crossover at desired frequency

• Application to example problem
• Note gain must be increased to meet
  specifications

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Phase Lead Design Process Step 2

• Plot Bode plot of KG(s), determine the required
  phase lead compensation, and add a buffer of 5-10
  degrees

• Application to example problem

The phase margin at 7.5 rad/s is 180-1728. We
need to add at least 50-842 of phase lead.
With a 5º buffer, we will ask for 47º of phase
lead.
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Phase Lead Design Process Step 3

• Choose a to add the required phase lead

• Application to example problem

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Phase Lead Design Process Step 4

• Determine new crossover frequency where the
  open loop magnitude is . Solve
  for t using

• Application to example problem

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Compensated Frequency Response
Original Compensated
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Phase Lead Compensator
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Compensated Nichols chart and Closed Loop Step
Response
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Example 2

• Choose so that
• Zero steady state error for step input

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Example 2 (2)
Desired Phase Margin
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Example 2 (3)

• Desired Bandwidth

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Example 2 (4)

• Plot

Specification
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Example 2 (5)

• Plot

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Example 2 (6)
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Example 2 (7)
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Lead Compensator Design Using Root Locus
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Example Lead Compensator Design Problem

• Choose so that

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Step 1 Plot Root Locus of G(s)

• Compute the desired closed loop pole locations at
  the allowable region corner points
• Does the locus of G(s) pass through desired pole
  locations?

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Steps 2 and 3 Find Zero and Pole Locations

• Place zero of lead compensator equal to real part
  of closed loop pole location
• Determine pole location so that

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Step 4 Compute K

• Plot root locus of and find
  K to place closed loop poles at the desired
  locations.

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Check Closed Loop Step Response
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Example 2

• Choose C(s) so that
• Zero steady state error for step input

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Example 2 (2)
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Example 2 (3)

• Desired closed loop pole locations

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Example 2 (4)

• Place zero of lead compensator equal to real part
  of closed loop pole location
• Determine pole location so that

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Example 2 (5)

• Plot root locus of and find
  K to place closed loop poles

Close to our choices of z and wn, but not quite
there (due to pole at zero pulling the loci back
toward the origin a bit).
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Phase Lag Compensator Design
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Lag Compensation

• Lag Compensator is used to increase low frequency
  gain relative to high frequency gain
• Used to meet steady state error and phase margin
  specifications simultaneously.

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Design Process Summary

• Determine low frequency gain
• Choose K to satisfy steady state error
  requirement
  

• Plot Bode plot of KG(s) and determine frequency
  where phase margin spec is met (with buffer of 5
  degrees). Choose this frequency as desired
  crossover.

• Choose the zero to be one decade low the desired
  crossover frequency

• Determine attenuation required to achieve new
  desired crossover.

Gain at desired crossover frequency
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Design Example

• Design a lag compensator to meet the
  specifications given below
• Choose KC(s) so that
• Kv 20 (steady-state error to unit ramp lt 0.05)
  
• fm 50?

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Step 1 Choose K

• Choose K to satisfy steady state error
  requirement
  

• Application to example problem
• Desired Kv 20
• The static error velocity constant is given by
• So, we choose K 2.

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Step 2 Determine Desired Crossover Frequency

• Plot Bode plot of KG(s) and determine frequency
  where phase margin spec is met (with buffer of 5
  degrees). Choose this as desired crossover
  frequency

• Application to example problem
• The desired phase margin is 50?, plus buffer 5?,
  for a total required phase margin of 55?
• Thus, we need a phase angle of -125?, which
  occurs at a frequency of 0.7 rad/s

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Step 3 Design Controller Zero

• Set t so that the controller zero is one decade
  below the desired crossover frequency

• Application to example problem

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Step 4 Compute a

• Determine attenuation required to achieve new
  desired crossover.

Gain at desired crossover frequency

• Application to example problem

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Compensated Frequency Response
Original Compensated
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Phase Lag Compensator
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Compensated Step and Ramp Responses
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Example 2

• Choose so that
• Unit ramp response steady state error .02

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Convert to Frequency Response Specifications
Example 2 (2)
Desired Phase Lead
Desired Error Constant
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Example 2 (3)

• Need one integrator to meet ramp steady state
  error spec.

we wanted Kv 50, so choose K 100
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Plot gain (and integrator) compensated bode plot
Example 2 (4)
Phase to look for
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Phase lag compensator parameters
Example 2 (5)
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Bode plot of C(s)G(s)
Example 2 (6)
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